Inventor · disambiguated record
Suresh Balasubramanian
Also filed as: BALASUBRAMANIAN SURESH
23 granted patents·3 pending applications·123 citations·filing 2001–2024
94Inventor score
Top patents by PatentIndex Score
26 records- 0190US7349285B2Dual port memory unit using a single port memory coreTEXAS INSTRUMENTS INC·Filed 2005·Granted Mar 25, 2008·28 cites·16 claims
- 0283US10742201B2Hybrid pulse/master-slave data latchAPPLE INC·Filed 2019·Granted Aug 11, 2020·3 cites·20 claims
- 0381US9130549B2Multiplexer flopCAVIUM INC·Filed 2014·Granted Sep 8, 2015·6 cites·19 claims
- 0481US7015727B2Generating a lock signal indicating whether an output clock signal generated by a PLL is in lock with an input reference signalTEXAS INSTRUMENTS INC·Filed 2001·Granted Mar 21, 2006·21 cites·9 claims
- 0578US7684274B2High performance, area efficient direct bitline sensing circuitTEXAS INSTRUMENTS INC·Filed 2007·Granted Mar 23, 2010·16 cites·19 claims
- 0678US7568118B2Deterministic operation of an input/output interfaceINTEL CORP·Filed 2005·Granted Jul 28, 2009·8 cites·21 claims
- 0773US9143140B2Multi-function delay locked loopLIN DAVID·Filed 2012·Granted Sep 22, 2015·3 cites·7 claims
- 0870US11870442B2Hybrid pulse/two-stage data latchAPPLE INC·Filed 2022·Granted Jan 9, 2024·0 cites·20 claims
- 0970US8381075B2Low-power redundancy for non-volatile memoryTEXAS INSTRUMENTS INC·Filed 2010·Granted Feb 19, 2013·4 cites·19 claims
- 1068US9417655B2Frequency division clock alignmentCAVIUM INC·Filed 2014·Granted Aug 16, 2016·3 cites·18 claims
- 1168US9411361B2Frequency division clock alignment using pattern selectionCAVIUM INC·Filed 2014·Granted Aug 9, 2016·3 cites·16 claims
- 1268US2024304223A1High Speed Differential ROMTEXAS INSTRUMENTS INC·Filed 2024·Application pending·0 cites
- 1367US7016245B2Tracking circuit enabling quick/accurate retrieval of data stored in a memory arrayTEXAS INSTRUMENTS INC·Filed 2004·Granted Mar 21, 2006·17 cites·19 claims
- 1465US11418173B2Hybrid pulse/two-stage data latchAPPLE INC·Filed 2020·Granted Aug 16, 2022·0 cites·20 claims
- 1563US12027229B2High speed differential romTEXAS INSTRUMENTS INC·Filed 2022·Granted Jul 2, 2024·0 cites·18 claims
- 1662US9306584B2Multi-function delay locked loopCAVIUM INC·Filed 2015·Granted Apr 5, 2016·1 cites·10 claims
- 1759US9264023B2Scannable flop with a single storage elementCAVIUM INC·Filed 2014·Granted Feb 16, 2016·1 cites·9 claims
- 1853US11762413B2Clock duty cycle correctionAPPLE INC·Filed 2021·Granted Sep 19, 2023·0 cites·20 claims
- 1952US7012846B2Sense amplifier for a memory arrayTEXAS INSTRUMENTS INC·Filed 2004·Granted Mar 14, 2006·8 cites·10 claims
- 2050US9335784B2Clock distribution circuit with distributed delay locked loopCAVIUM INC·Filed 2013·Granted May 10, 2016·0 cites·8 claims
- 2149US8513994B2State machine for deskew delay locked loopBALASUBRAMANIAN SURESH·Filed 2012·Granted Aug 20, 2013·1 cites·11 claims
- 2249US2018101797A1Systems and methods for improving sales process workflowLIVEHIVE INC·Filed 2017·Application pending·0 cites
- 2347US11145378B2Methods and apparatus to improve performance while reading a one-time programmable memoryTEXAS INSTRUMENTS INC·Filed 2019·Granted Oct 12, 2021·0 cites·18 claims
- 2445US11170864B2Methods and apparatus to improve performance while reading a one-time-programmable memoryTEXAS INSTRUMENTS INC·Filed 2019·Granted Nov 9, 2021·0 cites·44 claims
- 2544US8963601B1Clock gated delay line based on setting valueCAVIUM INC·Filed 2013·Granted Feb 24, 2015·0 cites·4 claims
- 2642US2018204226A1End-to-end sales workflow acceleration systems and methodsLIVEHIVE INC·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →