Inventor · disambiguated record
Wai-Bor Leung
Also filed as: LEUNG WAI-BOR
15 granted patents·542 citations·filing 1993–2014
94Inventor score
Top patents by PatentIndex Score
15 records- 0195US8751551B2Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitryALTERA CORP·Filed 2013·Granted Jun 10, 2014·32 cites·10 claims
- 0294US5394031AApparatus and method to improve programming speed of field programmable gate arraysAT & T CORP·Filed 1993·Granted Feb 28, 1995·81 cites·9 claims
- 0394US5386156AProgrammable function unit with programmable fast ripple logicAT & T CORP·Filed 1993·Granted Jan 31, 1995·86 cites·10 claims
- 0489US8307023B1DSP block for implementing large multiplier on a programmable integrated circuit deviceLEUNG WAI-BOR·Filed 2008·Granted Nov 6, 2012·32 cites·29 claims
- 0589US6043677AProgrammable clock manager for a programmable logic device that can implement delay-locked loop functionsLUCENT TECHNOLOGIES INC·Filed 1997·Granted Mar 28, 2000·62 cites·9 claims
- 0689US5457408AMethod and apparatus for verifying whether a bitstream received by a field programmable gate array (FPGA) is intended for that FPGAAT & T CORP·Filed 1994·Granted Oct 10, 1995·139 cites·21 claims
- 0784US8700825B1Heterogeneous high-speed serial interface system with phase-locked loop architecture and clock distribution systemALTERA CORP·Filed 2012·Granted Apr 15, 2014·6 cites·25 claims
- 0877US8549055B2Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitrySTREICHER KEONE·Filed 2010·Granted Oct 1, 2013·5 cites·15 claims
- 0972US8866304B2Integrated circuit device with stitched interposerALTERA CORP·Filed 2012·Granted Oct 21, 2014·3 cites·19 claims
- 1070US6216191B1Field programmable gate array having a dedicated processor interfaceLUCENT TECHNOLOGIES INC·Filed 1997·Granted Apr 10, 2001·57 cites·7 claims
- 1157US7532646B2Distributed multiple-channel alignment schemeLATTICE SEMICONDUCTOR CORP·Filed 2005·Granted May 12, 2009·1 cites·23 claims
- 1256US8620977B1Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitryALTERA CORP·Filed 2013·Granted Dec 31, 2013·0 cites·18 claims
- 1354US6028463AProgrammable clock manager for a programmable logic device that can generate at least two different output clocksLUCENT TECHNOLOGIES INC·Filed 1997·Granted Feb 22, 2000·28 cites·24 claims
- 1450US8812755B2Heterogeneous high-speed serial interface system with phase-locked loop architecture and clock distribution systemALTERA CORP·Filed 2014·Granted Aug 19, 2014·0 cites·20 claims
- 1550US6060902AProgrammable clock manager for a programmable logic device that can be programmed without reconfiguring the deviceFiled 1997·Granted May 9, 2000·10 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →