Inventor · disambiguated record
Thomas J. Heller, Jr.
Also filed as: HELLER JR THOMAS J · HELLER JR THOMAS JAMES · HELLER THOMAS · HELLER THOMAS J
42 granted patents·2 pending applications·987 citations·filing 1996–2021
98Inventor score
Top patents by PatentIndex Score
44 records- 0196US8028290B2Multiple-core processor supporting multiple instruction set architecturesIBM·Filed 2006·Granted Sep 27, 2011·54 cites·9 claims
- 0295US8117403B2Transactional memory system which employs thread assists using address history tablesHELLER JR THOMAS J·Filed 2007·Granted Feb 14, 2012·49 cites·19 claims
- 0394US5875470AMulti-port multiple-simultaneous-access DRAM chipIBM·Filed 1997·Granted Feb 23, 1999·140 cites·11 claims
- 0492US8788672B2Microprocessor with software control over allocation of shared resources among multiple virtual serversHELLER JR THOMAS J·Filed 2012·Granted Jul 22, 2014·15 cites·11 claims
- 0592US8095750B2Transactional memory system with fast processing of common conflictsHELLER JR THOMAS J·Filed 2007·Granted Jan 10, 2012·32 cites·19 claims
- 0692US5895487AIntegrated processing and L2 DRAM cacheIBM·Filed 1996·Granted Apr 20, 1999·203 cites·11 claims
- 0790US8321637B2Computing system with optimized support for transactional memoryBAUM RICHARD I·Filed 2007·Granted Nov 27, 2012·33 cites·25 claims
- 0889US7401240B2Method for dynamically managing power in microprocessor chips according to present processing demandsIBM·Filed 2004·Granted Jul 15, 2008·52 cites·21 claims
- 0987US8095741B2Transactional memory computing system with support for chained transactionsHELLER JR THOMAS J·Filed 2007·Granted Jan 10, 2012·32 cites·20 claims
- 1087US6457100B1Scaleable shared-memory multi-processor computer system having repetitive chip structure with efficient busing and coherence controlsIBM·Filed 1999·Granted Sep 24, 2002·145 cites·31 claims
- 1186US9430153B2Garbage collection and other management of memory heapsIBM·Filed 2014·Granted Aug 30, 2016·6 cites·18 claims
- 1285US8806182B2Multiple-core processor supporting multiple instruction set architecturesRYMARCZYK JAMES WALTER·Filed 2011·Granted Aug 12, 2014·12 cites·13 claims
- 1383US9104427B2Computing system with transactional memory using millicode assistsIBM·Filed 2012·Granted Aug 11, 2015·6 cites·11 claims
- 1480US8484495B2Power management in a multi-processor computer systemBOYD WILLIAM T·Filed 2010·Granted Jul 9, 2013·7 cites·25 claims
- 1580US8032736B2Methods, apparatus and articles of manufacture for regaining memory consistency after a trap via transactional memoryIBM·Filed 2008·Granted Oct 4, 2011·12 cites·24 claims
- 1679US8676976B2Microprocessor with software control over allocation of shared resources among multiple virtual serversHELLER JR THOMAS J·Filed 2009·Granted Mar 18, 2014·8 cites·15 claims
- 1778US8516202B2Hybrid transactional memory system (HybridTM) and methodHELLER JR THOMAS J·Filed 2009·Granted Aug 20, 2013·7 cites·15 claims
- 1877US7469321B2Software process migration between coherency regions without cache purgesIBM·Filed 2003·Granted Dec 23, 2008·24 cites·30 claims
- 1976US8489904B2Allocating computing system power levels responsive to service level agreementsBOYD WILLIAM T·Filed 2010·Granted Jul 16, 2013·5 cites·23 claims
- 2076US7955937B2Method for manufacturing semiconductor device comprising SOI transistors and bulk transistorsADVANCED MICRO DEVICES INC·Filed 2006·Granted Jun 7, 2011·7 cites·7 claims
- 2175US8417974B2Power efficient stack of multicore microprocessorsHELLER JR THOMAS J·Filed 2009·Granted Apr 9, 2013·6 cites·18 claims
- 2273US8688920B2Computing system with guest code support of transactional memoryHELLER JR THOMAS J·Filed 2007·Granted Apr 1, 2014·6 cites·28 claims
- 2372US8738862B2Transactional memory system with efficient cache supportIBM·Filed 2013·Granted May 27, 2014·2 cites·12 claims
- 2472US8667231B2Transactional memory system with efficient cache supportIBM·Filed 2012·Granted Mar 4, 2014·2 cites·6 claims
- 2572US8566524B2Transactional memory system with efficient cache supportHELLER JR THOMAS J·Filed 2009·Granted Oct 22, 2013·4 cites·15 claims
- 2671US6595299B2Method and apparatus for automatically connecting a drive member to a driven memberFiled 2001·Granted Jul 22, 2003·17 cites·18 claims
- 2770US7484043B2Multiprocessor system with dynamic cache coherency regionsIBM·Filed 2003·Granted Jan 27, 2009·13 cites·19 claims
- 2869US9170844B2Prioritization for conflict arbitration in transactional memory managementBLAINEY ROBERT J·Filed 2009·Granted Oct 27, 2015·5 cites·14 claims
- 2968US7568060B2Method and system for interfacing components of a computing system with a pair of unidirectional, point-to-point busesIBM·Filed 2005·Granted Jul 28, 2009·4 cites·9 claims
- 3067US7647519B2System and computer program product for dynamically managing power in microprocessor chips according to present processing demandsIBM·Filed 2008·Granted Jan 12, 2010·3 cites·22 claims
- 3164US9009452B2Computing system with transactional memory using millicode assistsHELLER JR THOMAS J·Filed 2007·Granted Apr 14, 2015·2 cites·10 claims
- 3263US8972794B2Method and apparatus for diagnostic recording using transactional memoryWILDING MARK FRANCIS·Filed 2008·Granted Mar 3, 2015·4 cites·15 claims
- 3361US6052771AMicroprocessor with pipeline synchronizationIBM·Filed 1998·Granted Apr 18, 2000·39 cites·27 claims
- 3460US10146685B2Garbage collection and other management of memory heapsIBM·Filed 2017·Granted Dec 4, 2018·0 cites·20 claims
- 3558US9772941B2Garbage collection and other management of memory heapsIBM·Filed 2016·Granted Sep 26, 2017·0 cites·20 claims
- 3656US9740608B2Garbage collection and other management of memory heapsIBM·Filed 2015·Granted Aug 22, 2017·0 cites·9 claims
- 3756US6827154B2Method and apparatus for automatically connecting a drive member to a driven memberFiled 2003·Granted Dec 7, 2004·8 cites·13 claims
- 3855US8819352B2Hybrid Transactional Memory (HybridTM)IBM·Filed 2013·Granted Aug 26, 2014·0 cites·20 claims
- 3952US2008147988A1Multiprocessor System With Dynamic Cache Coherency RegionsIBM·Filed 2008·Application pending·0 cites
- 4050US8862786B2Program execution with improved power efficiencyHELLER JR THOMAS J·Filed 2009·Granted Oct 14, 2014·0 cites·12 claims
- 4150US6047367AMicroprocessor with improved out of order supportIBM·Filed 1998·Granted Apr 4, 2000·23 cites·11 claims
- 4244US11962833B2Source devices, sink devices, methods and computer programsFRAUNHOFER GES FORSCHUNG·Filed 2021·Granted Apr 16, 2024·0 cites·30 claims
- 4344US9146678B2High throughput hardware acceleration using pre-staging buffersIBM·Filed 2013·Granted Sep 29, 2015·0 cites·19 claims
- 4441US2006109089A1Sports timer actuation systemBOEHM TRAVIS A·Filed 2004·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Thomas J. Heller, Jr. files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →