Inventor · disambiguated record
Aaron C. Sawdey
Also filed as: SAWDEY AARON C · SAWDEY AARON CHRISTOPH
22 granted patents·157 citations·filing 2003–2018
94Inventor score
Technology areasG06F
Top patents by PatentIndex Score
22 records- 0191US8930625B2Weighted history allocation predictor algorithm in a hybrid cacheDALY DAVID M·Filed 2012·Granted Jan 6, 2015·14 cites·7 claims
- 0290US8688915B2Weighted history allocation predictor algorithm in a hybrid cacheDALY DAVID M·Filed 2011·Granted Apr 1, 2014·12 cites·14 claims
- 0390US7536513B2Data processing system, cache system and method for issuing a request on an interconnect fabric without reference to a lower level cache based upon a tagged cache stateIBM·Filed 2005·Granted May 19, 2009·23 cites·18 claims
- 0483US7478197B2Adaptive mechanisms for supplying volatile data copies in multiprocessor systemsIBM·Filed 2006·Granted Jan 13, 2009·15 cites·4 claims
- 0580US7716424B2Victim prefetching in a cache hierarchyIBM·Filed 2004·Granted May 11, 2010·33 cites·18 claims
- 0679US9298651B2Continuous in-memory accumulation of hardware performance counter dataIBM·Filed 2013·Granted Mar 29, 2016·5 cites·20 claims
- 0779US9218292B2Least-recently-used (LRU) to first-dirty-member distance-maintaining cache cleaning schedulerIBM·Filed 2013·Granted Dec 22, 2015·4 cites·11 claims
- 0879US8788757B2Dynamic inclusive policy in a hybrid cache hierarchy using hit rateDALY DAVID M·Filed 2011·Granted Jul 22, 2014·5 cites·23 claims
- 0976US8161493B2Weighted-region cycle accounting for multi-threaded processor coresFLOYD MICHAEL S·Filed 2008·Granted Apr 17, 2012·8 cites·18 claims
- 1076US7136967B2Multi-level cache having overlapping congruence groups of associativity sets in different cache levelsINTERNAT BUSINESS MACHINCES CO·Filed 2003·Granted Nov 14, 2006·26 cites·36 claims
- 1171US9213647B2Least-recently-used (LRU) to first-dirty-member distance-maintaining cache cleaning schedulerIBM·Filed 2013·Granted Dec 15, 2015·2 cites·6 claims
- 1271US7237070B2Cache memory, processing unit, data processing system and method for assuming a selected invalid coherency state based upon a request sourceIBM·Filed 2005·Granted Jun 26, 2007·5 cites·19 claims
- 1368US9298580B2Assessment of processor performance metrics by monitoring probes constructed using instruction sequencesIBM·Filed 2014·Granted Mar 29, 2016·1 cites·7 claims
- 1462US10754749B2Assessment of processor performance metrics by monitoring probes constructed using instruction sequencesIBM·Filed 2018·Granted Aug 25, 2020·0 cites·3 claims
- 1562US8910125B2Monitoring software performanceIBM·Filed 2012·Granted Dec 9, 2014·1 cites·18 claims
- 1662US8843707B2Dynamic inclusive policy in a hybrid cache hierarchy using bandwidthDALY DAVID M·Filed 2011·Granted Sep 23, 2014·1 cites·18 claims
- 1762US7512739B2Updating a node-based cache LRU treeIBM·Filed 2006·Granted Mar 31, 2009·2 cites·5 claims
- 1860US10031827B2Assessment of processor performance metrics by monitoring probes constructed using instruction sequencesIBM·Filed 2017·Granted Jul 24, 2018·0 cites·20 claims
- 1957US9760465B2Assessment of processor performance metrics by monitoring probes constructed using instruction sequencesIBM·Filed 2014·Granted Sep 12, 2017·0 cites·9 claims
- 2053US9612974B2Storing service level agreement compliance dataIBM·Filed 2015·Granted Apr 4, 2017·0 cites·10 claims
- 2152US9600336B1Storing service level agreement compliance dataIBM·Filed 2015·Granted Mar 21, 2017·0 cites·15 claims
- 2250US8131938B2Adaptive mechanisms and methods for supplying volatile data copies in multiprocessor systemsSHEN XIAOWEI·Filed 2008·Granted Mar 6, 2012·0 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →