Inventor · disambiguated record
Hirokazu Yonezawa
Also filed as: YONEZAWA HIROKAZU
12 granted patents·2 pending applications·314 citations·filing 1992–2006
93Inventor score
Top patents by PatentIndex Score
14 records- 0185US5475825ASemiconductor device having combined fully associative memoriesMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1992·Granted Dec 12, 1995·61 cites·8 claims
- 0284US7239997B2Apparatus for statistical LSI delay simulationMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2004·Granted Jul 3, 2007·42 cites·19 claims
- 0382US7222319B2Timing analysis method and apparatusMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2005·Granted May 22, 2007·12 cites·11 claims
- 0476US7308381B2Timing verification method for semiconductor integrated circuitMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2006·Granted Dec 11, 2007·8 cites·11 claims
- 0575US6278964B1Hot carrier effect simulation for integrated circuitsMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1998·Granted Aug 21, 2001·40 cites·46 claims
- 0673US6795802B2Apparatus and method for calculating temporal deterioration margin amount of LSI, and LSI inspection methodMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2001·Granted Sep 21, 2004·18 cites·15 claims
- 0772US7197728B2Method for setting design margin for LSIMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2004·Granted Mar 27, 2007·17 cites·15 claims
- 0868US6869808B2Method for evaluating property of integrated circuitryMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2002·Granted Mar 22, 2005·12 cites·8 claims
- 0964US6219630B1Apparatus and method for extracting circuit, system and method for generating information for simulation, and netlistMATSUSHITA ELECTRONICS CORP·Filed 1996·Granted Apr 17, 2001·54 cites·24 claims
- 1060US5974247AApparatus and method of LSI timing degradation simulationMATSUSHITA ELECTRONICS CORP·Filed 1997·Granted Oct 26, 1999·39 cites·17 claims
- 1145US2005177356A1Circuit simulation method and circuit simulation apparatusMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2004·Application pending·0 cites
- 1242US2006107244A1Method for designing semiconductor intgrated circuit and system for designing the sameMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2005·Application pending·0 cites
- 1335US5661413AProcessor utilizing a low voltage data circuit and a high voltage controllerMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1995·Granted Aug 26, 1997·4 cites·10 claims
- 1435US5463751AMemory device having address translator and comparator for comparing memory cell array outputsMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1994·Granted Oct 31, 1995·7 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →