Inventor · disambiguated record
Robert J. Hillard
Also filed as: HILLARD ROBERT J
11 granted patents·4 pending applications·272 citations·filing 1990–2007
91Inventor score
Top patents by PatentIndex Score
15 records- 0195US7023231B2Work function controlled probe for measuring properties of a semiconductor wafer and method of use thereofSOLID STATE MEASUREMENTS INC·Filed 2004·Granted Apr 4, 2006·112 cites·20 claims
- 0291US6492827B1Non-invasive electrical measurement of semiconductor wafersSOLID STATE MEASUREMENTS INC·Filed 2000·Granted Dec 10, 2002·60 cites·18 claims
- 0380US5023561AApparatus and method for non-invasive measurement of electrical properties of a dielectric layer in a semiconductor waferSOLID STATE MEASUREMENTS INC·Filed 1990·Granted Jun 11, 1991·49 cites·9 claims
- 0471US6741093B2Method of determining one or more properties of a semiconductor waferSOLID STATE MEASUREMENTS INC·Filed 2002·Granted May 25, 2004·15 cites·19 claims
- 0560US6991948B2Method of electrical characterization of a silicon-on-insulator (SOI) waferSOLID STATE MEASUREMENTS INC·Filed 2003·Granted Jan 31, 2006·9 cites·15 claims
- 0659US7327155B2Elastic metal gate MOS transistor for surface mobility measurement in semiconductor materialsSOLID STATE MEASUREMENTS INC·Filed 2005·Granted Feb 5, 2008·3 cites·11 claims
- 0755US7295022B2Method and system for automatically determining electrical properties of a semiconductor wafer or sampleSOLID STATE MEASUREMENTS INC·Filed 2005·Granted Nov 13, 2007·4 cites·16 claims
- 0848US6879176B1Conductance-voltage (GV) based method for determining leakage current in dielectricsSOLID STATE MEASUREMENTS INC·Filed 2003·Granted Apr 12, 2005·4 cites·15 claims
- 0946US7005307B2Apparatus and method for detecting soft breakdown of a dielectric layer of a semiconductor waferSOLID STATE MEASUREMENTS INC·Filed 2004·Granted Feb 28, 2006·3 cites·18 claims
- 1045US6150832ANoncontact capacitance measuring deviceSOLID STATE MEASUREMENTS INC·Filed 1999·Granted Nov 21, 2000·12 cites·8 claims
- 1144US2008290889A1Method of destructive testing the dielectric layer of a semiconductor wafer or sampleSOLID STATE MEASUREMENTS INC·Filed 2007·Application pending·0 cites
- 1243US2007249073A1Method for determining the electrically active dopant density profile in ultra-shallow junction (USJ) structuresSOLID STATE MEASUREMENT INC·Filed 2007·Application pending·0 cites
- 1341US7037734B2Method and apparatus for determining generation lifetime of product semiconductor wafersSOLID STATE MEASUREMENTS INC·Filed 2004·Granted May 2, 2006·1 cites·17 claims
- 1433US2005225345A1Method of testing semiconductor wafers with non-penetrating probesSOLID STATE MEASUREMENTS INC·Filed 2005·Application pending·0 cites
- 1533US2004108869A1Method of detecting carrier dose of a semiconductor waferFiled 2002·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Robert J. Hillard files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →