Inventor · disambiguated record
Prakash Krishnamoorthy
Also filed as: KRISHNAMOORTHY PRAKASH · KRISHNAMOORTHY PRAKASH SUNDRA
12 granted patents·3 pending applications·53 citations·filing 2007–2013
88Inventor score
Top patents by PatentIndex Score
15 records- 0191US8904255B2Integrated circuit having clock gating circuitry responsive to scan shift control signalTEKUMALLA RAMESH C·Filed 2012·Granted Dec 2, 2014·11 cites·19 claims
- 0289US8924801B2At-speed scan testing of interface functional logic of an embedded memory or other circuit coreLSI CORP·Filed 2013·Granted Dec 30, 2014·8 cites·20 claims
- 0387US8700962B2Scan test circuitry configured to prevent capture of potentially non-deterministic valuesTEKUMALLA RAMESH C·Filed 2012·Granted Apr 15, 2014·7 cites·20 claims
- 0487US8645778B2Scan test circuitry with delay defect bypass functionalityTEKUMALLA RAMESH C·Filed 2011·Granted Feb 4, 2014·7 cites·20 claims
- 0584US8726108B2Scan test circuitry configured for bypassing selected segments of a multi-segment scan chainTEKUMALLA RAMESH C·Filed 2012·Granted May 13, 2014·7 cites·20 claims
- 0682US8566658B2Low-power and area-efficient scan cell for integrated circuit testingTEKUMALLA RAMESH C·Filed 2011·Granted Oct 22, 2013·6 cites·22 claims
- 0769US7711729B2Searching a document based on a customer defined metadata schemataMICROSOFT CORP·Filed 2007·Granted May 4, 2010·5 cites·9 claims
- 0866US8793546B2Integrated circuit comprising scan test circuitry with parallel reordered scan chainsTEKUMALLA RAMESH C·Filed 2011·Granted Jul 29, 2014·2 cites·15 claims
- 0949US8799731B2Clock control for reducing timing exceptions in scan testing of an integrated circuitLSI CORP·Filed 2012·Granted Aug 5, 2014·0 cites·24 claims
- 1049US8677200B2Integrated circuit with transition control circuitry for limiting scan test signal transitions during scan testingTEKUMALLA RAMESH C·Filed 2011·Granted Mar 18, 2014·0 cites·20 claims
- 1140US2014201584A1Scan test circuitry comprising at least one scan chain and associated reset multiplexing circuitryLSI CORP·Filed 2013·Application pending·0 cites
- 1238US9348593B2Instruction address encoding and decoding based on program construct groupsKRISHNAMOORTHY PRAKASH·Filed 2012·Granted May 24, 2016·0 cites·20 claims
- 1335US2013124594A1Divider circuitry with quotient prediction based on estimated partial remainderKRISHNAMOORTHY PRAKASH·Filed 2011·Application pending·0 cites
- 1435US2014281703A1Local Repair Signature Handling for Repairable MemoriesLSI CORP·Filed 2013·Application pending·0 cites
- 1533US8711013B2Coding circuitry for difference-based data transformationKRISHNAMOORTHY PRAKASH·Filed 2012·Granted Apr 29, 2014·0 cites·26 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →