Inventor · disambiguated record
Girish Venkatasubramanian
Also filed as: VENKATASUBRAMANIAN GIRISH
11 granted patents·3 pending applications·25 citations·filing 2013–2020
85Inventor score
Top patents by PatentIndex Score
14 records- 0188US9274799B1Instruction and logic for scheduling instructionsINTEL CORP·Filed 2014·Granted Mar 1, 2016·11 cites·20 claims
- 0278US9223553B2Methods and apparatus to validate translated guest code in a dynamic binary translatorINTEL CORP·Filed 2013·Granted Dec 29, 2015·5 cites·17 claims
- 0376US9858057B2Methods and apparatus to validate translated guest code in a dynamic binary translatorINTEL CORP·Filed 2015·Granted Jan 2, 2018·2 cites·20 claims
- 0474US11372775B2Management of the untranslated to translated code steering logic in a dynamic binary translation based processorINTEL CORP·Filed 2020·Granted Jun 28, 2022·1 cites·18 claims
- 0567US10055256B2Instruction and logic for scheduling instructionsINTEL CORP·Filed 2016·Granted Aug 21, 2018·1 cites·16 claims
- 0666US9460022B2Mechanism for facilitating dynamic and efficient management of translation buffer prefetching in software programs at computing systemsVENKATASUBRAMANIAN GIRISH·Filed 2013·Granted Oct 4, 2016·3 cites·23 claims
- 0764US9823938B2Providing deterministic, reproducible, and random sampling in a processorINTEL CORP·Filed 2015·Granted Nov 21, 2017·1 cites·17 claims
- 0861US10474442B2Methods and apparatus to perform region formation for a dynamic binary translation processorINTEL CORP·Filed 2017·Granted Nov 12, 2019·1 cites·30 claims
- 0950US2019163642A1Management of the untranslated to translated code steering logic in a dynamic binary translation based processorINTEL CORP·Filed 2017·Application pending·0 cites
- 1046US10191745B2Optimized call-return and binary translationINTEL CORP·Filed 2017·Granted Jan 29, 2019·0 cites·25 claims
- 1142US9916164B2Methods and apparatus to optimize instructions for execution by a processorINTEL CORP·Filed 2015·Granted Mar 13, 2018·0 cites·21 claims
- 1240US10083033B2Apparatus and method for efficient register allocation and reclamationINTEL CORP·Filed 2015·Granted Sep 25, 2018·0 cites·21 claims
- 1339US2019179766A1Translation table entry prefetching in dynamic binary translation based processorINTEL CORP·Filed 2017·Application pending·0 cites
- 1435US2016283247A1Apparatuses and methods to selectively execute a commit instructionINTEL CORP·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →