Inventor · disambiguated record
Fred Cheung
Also filed as: CHEUNG FRED · CHEUNG FRED T K · CHEUNG FRED TK
21 granted patents·2 pending applications·998 citations·filing 2001–2013
96Inventor score
Top patents by PatentIndex Score
23 records- 0198US6642573B1Use of high-K dielectric material in modified ONO structure for semiconductor devicesADVANCED MICRO DEVICES INC·Filed 2002·Granted Nov 4, 2003·253 cites·22 claims
- 0297US6740605B1Process for reducing hydrogen contamination in dielectric materials in memory devicesADVANCED MICRO DEVICES INC·Filed 2003·Granted May 25, 2004·140 cites·20 claims
- 0397US6451641B1Non-reducing process for deposition of polysilicon gate electrode over high-K gate dielectric materialADVANCED MICRO DEVICES INC·Filed 2002·Granted Sep 17, 2002·148 cites·20 claims
- 0496US6750066B1Precision high-K intergate dielectric layerADVANCED MICRO DEVICES INC·Filed 2002·Granted Jun 15, 2004·125 cites·9 claims
- 0593US6630383B1Bi-layer floating gate for improved work function between floating gate and a high-K dielectric layerADVANCED MICRO DEVICES INC·Filed 2002·Granted Oct 7, 2003·74 cites·21 claims
- 0692US7033957B1ONO fabrication process for increasing oxygen content at bottom oxide-substrate interface in flash memory devicesFASL LLC·Filed 2003·Granted Apr 25, 2006·62 cites·21 claims
- 0790US6949481B1Process for fabrication of spacer layer with reduced hydrogen content in semiconductor deviceFASL LLC·Filed 2003·Granted Sep 27, 2005·50 cites·20 claims
- 0888US6794764B1Charge-trapping memory arrays resistant to damage from contact hole informationADVANCED MICRO DEVICES INC·Filed 2003·Granted Sep 21, 2004·48 cites·20 claims
- 0982US7732281B1Methods for fabricating dual bit flash memory devicesSPANSION LLC·Filed 2006·Granted Jun 8, 2010·8 cites·18 claims
- 1078US7163860B1Method of formation of gate stack spacer and charge storage materials having reduced hydrogen content in charge trapping dielectric flash memory deviceSPANSION LLC·Filed 2003·Granted Jan 16, 2007·25 cites·19 claims
- 1177US6610594B2Locally increasing sidewall density by ion implantationADVANCED MICRO DEVICES INC·Filed 2001·Granted Aug 26, 2003·20 cites·45 claims
- 1276US6514844B1Sidewall treatment for low dielectric constant (low K) materials by ion implantationADVANCED MICRO DEVICES INC·Filed 2001·Granted Feb 4, 2003·21 cites·32 claims
- 1375US6735123B1High density dual bit flash memory cell with non planar structureADVANCED MICRO DEVICES INC·Filed 2002·Granted May 11, 2004·20 cites·7 claims
- 1461US7829936B2Split charge storage node inner spacer processSPANSION LLC·Filed 2007·Granted Nov 9, 2010·2 cites·16 claims
- 1557US8486782B2Flash memory devices and methods for fabricating the sameCHENG NING·Filed 2006·Granted Jul 16, 2013·1 cites·20 claims
- 1651US8748972B2Flash memory devices and methods for fabricating sameSPANSION LLC·Filed 2013·Granted Jun 10, 2014·0 cites·10 claims
- 1751US7981745B2Sacrificial nitride and gate replacementSPANSION LLC·Filed 2007·Granted Jul 19, 2011·0 cites·18 claims
- 1848US8329598B2Sacrificial nitride and gate replacementLEE CHUNGHO·Filed 2011·Granted Dec 11, 2012·0 cites·20 claims
- 1944US9461151B2Dual storage node memoryCYPRESS SEMICONDUCTOR CORP·Filed 2013·Granted Oct 4, 2016·0 cites·10 claims
- 2044US2008150011A1Integrated circuit system with memory systemSPANSION LLC·Filed 2007·Application pending·0 cites
- 2142US8564042B2Dual storage node memoryCHEUNG FRED·Filed 2007·Granted Oct 22, 2013·1 cites·13 claims
- 2242US7867848B2Methods for fabricating dual bit flash memory devicesSPANSION LLC·Filed 2010·Granted Jan 11, 2011·0 cites·15 claims
- 2341US2008153236A1Flash memory devices and methods for fabricating the sameCHENG NING·Filed 2006·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Fred Cheung files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →