Inventor · disambiguated record
Jinhan Choi
Also filed as: CHOI JINHAN
13 granted patents·7 pending applications·196 citations·filing 2002–2020
89Inventor score
Files withAPPLIED MATERIALS INC11TEXAS INSTRUMENTS INC5CHIANG KANG-LIE1HONG HYESOOK1SRINIVASAN SUNIL1
Top patents by PatentIndex Score
20 records- 0195US9425058B2Simplified litho-etch-litho-etch processAPPLIED MATERIALS INC·Filed 2014·Granted Aug 23, 2016·145 cites·15 claims
- 0280US9064812B2Aspect ratio dependent etch (ARDE) lag reduction process by selective oxidation with inert gas sputteringAPPLIED MATERIALS INC·Filed 2013·Granted Jun 23, 2015·6 cites·20 claims
- 0380US7732284B1Post high-k dielectric/metal gate cleanTEXAS INSTRUMENTS INC·Filed 2008·Granted Jun 8, 2010·7 cites·17 claims
- 0475US6756313B2Method of etching silicon nitride spacers with high selectivity relative to oxide in a high density plasma chamberFiled 2002·Granted Jun 29, 2004·22 cites·20 claims
- 0574US7910422B2Reducing gate CD bias in CMOS processingTEXAS INSTRUMENTS INC·Filed 2008·Granted Mar 22, 2011·5 cites·26 claims
- 0664US7754610B2Process for etching tungsten silicide overlying polysilicon particularly in a flash memoryAPPLIED MATERIALS INC·Filed 2006·Granted Jul 13, 2010·2 cites·35 claims
- 0759US9281190B2Local and global reduction of critical dimension (CD) asymmetry in etch processingCHIANG KANG-LIE·Filed 2014·Granted Mar 8, 2016·1 cites·8 claims
- 0857US8747684B2Multi-film stack etching with polymer passivation of an overlying etched layerSRINIVASAN SUNIL·Filed 2010·Granted Jun 10, 2014·1 cites·18 claims
- 0956US7368392B2Method of fabricating a gate structure of a field effect transistor having a metal-containing gate electrodeAPPLIED MATERIALS INC·Filed 2004·Granted May 6, 2008·7 cites·41 claims
- 1053US11437230B2Amorphous carbon multilayer coating with directional protectionAPPLIED MATERIALS INC·Filed 2020·Granted Sep 6, 2022·0 cites·20 claims
- 1147US2007281479A1Process including silo-chloro passivation for etching tungsten silicide overlying polysiliconAPPLIED MATERIALS INC·Filed 2006·Application pending·0 cites
- 1245US2008233747A1Semiconductor Device Manufactured Using an Improved Plasma Etch Process for a Fully Silicided Gate Flow ProcessTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
- 1344US9627216B2Method for forming features in a silicon containing layerAPPLIED MATERIALS INC·Filed 2014·Granted Apr 18, 2017·0 cites·20 claims
- 1443US2008242072A1Plasma dry etch process for metal-containing gatesTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
- 1541US7785957B2Post metal gate VT adjust etch cleanTEXAS INSTRUMENTS INC·Filed 2008·Granted Aug 31, 2010·0 cites·31 claims
- 1640US2015371889A1Methods for shallow trench isolation formation in a silicon germanium layerAPPLIED MATERIALS INC·Filed 2014·Application pending·0 cites
- 1738US10586696B2Halogen abatement for high aspect ratio channel device damage layer removal for EPI growthAPPLIED MATERIALS INC·Filed 2018·Granted Mar 10, 2020·0 cites·19 claims
- 1837US2005098536A1Method of etching oxide with high selectivityAPPLIED MATERIALS INC·Filed 2003·Application pending·0 cites
- 1934US2016056059A1Component for semiconductor process chamber having surface treatment to reduce particle emissionAPPLIED MATERIALS INC·Filed 2015·Application pending·0 cites
- 2034US2009104745A1Integration method for dual doped polysilicon gate profile and cd controlHONG HYESOOK·Filed 2007·Application pending·0 cites
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