Inventor · disambiguated record
Seng-Sooi Lim
Also filed as: LIM SENG S · LIM SENG-SOOI · LIM SENG-SOOI ALLEN
26 granted patents·2 pending applications·1,309 citations·filing 1991–2004
97Inventor score
Technology areasH10W
Top patents by PatentIndex Score
28 records- 0195US6081997ASystem and method for packaging an integrated circuit using encapsulant injectionLSI LOGIC CORP·Filed 1997·Granted Jul 4, 2000·202 cites·21 claims
- 0294US5973393AApparatus and method for stackable molded lead frame ball grid array packaging of integrated circuitsLSI LOGIC CORP·Filed 1996·Granted Oct 26, 1999·169 cites·4 claims
- 0390US6225695B1Grooved semiconductor die for flip-chip heat sink attachmentLSI LOGIC CORP·Filed 1997·Granted May 1, 2001·123 cites·16 claims
- 0488US6002169AThermally enhanced tape ball grid array packageLSI LOGIC CORP·Filed 1998·Granted Dec 14, 1999·114 cites·9 claims
- 0588US5197183AModified lead frame for reducing wire wash in transfer molding of IC packagesLSI LOGIC CORP·Filed 1991·Granted Mar 30, 1993·107 cites·6 claims
- 0685US5262927APartially-molded, PCB chip carrier packageLSI LOGIC CORP·Filed 1992·Granted Nov 16, 1993·85 cites·11 claims
- 0784US5434750APartially-molded, PCB chip carrier package for certain non-square die shapesLSI LOGIC CORP·Filed 1993·Granted Jul 18, 1995·68 cites·18 claims
- 0883US6519844B1Overmold integrated circuit packageLSI LOGIC CORP·Filed 2001·Granted Feb 18, 2003·36 cites·9 claims
- 0980US5744084AMethod of improving molding of an overmolded package body on a substrateLSI LOGIC CORP·Filed 1995·Granted Apr 28, 1998·54 cites·4 claims
- 1077US6114189AMolded array integrated circuit packageLSI LOGIC CORP·Filed 1997·Granted Sep 5, 2000·51 cites·18 claims
- 1175US5643835AProcess for manufacturing and mounting a semiconductor device leadframe having alignment tabsLSI LOGIC CORP·Filed 1996·Granted Jul 1, 1997·41 cites·6 claims
- 1275US5594626APartially-molded, PCB chip carrier package for certain non-square die shapesLSI LOGIC CORP·Filed 1995·Granted Jan 14, 1997·43 cites·30 claims
- 1372US5353193AHigh power dissipating packages with matched heatspreader heatsink assembliesLSI LOGIC CORP·Filed 1993·Granted Oct 4, 1994·35 cites·18 claims
- 1471US6525421B1Molded integrated circuit packageLSI LOGIC CORP·Filed 2001·Granted Feb 25, 2003·18 cites·5 claims
- 1570US5521427APrinted wiring board mounted semiconductor device having leadframe with alignment featureLSI LOGIC CORP·Filed 1994·Granted May 28, 1996·36 cites·15 claims
- 1668US6512293B1Mechanically interlocking ball grid array packages and method of makingLSI LOGIC CORP·Filed 2001·Granted Jan 28, 2003·15 cites·11 claims
- 1765US5927505AOvermolded package body on a substrateLSI LOGIC CORP·Filed 1997·Granted Jul 27, 1999·26 cites·4 claims
- 1864US6054767AProgrammable substrate for array-type packagesLSI LOGIC CORP·Filed 1998·Granted Apr 25, 2000·26 cites·15 claims
- 1962US5463529AHigh power dissipating packages with matched heatspreader heatsink assembliesLSI LOGIC CORP·Filed 1994·Granted Oct 31, 1995·24 cites·28 claims
- 2047US6492253B1Method for programming a substrate for array-type packagesLSI LOGIC CORP·Filed 2000·Granted Dec 10, 2002·2 cites·4 claims
- 2145US6040632AMultiple sized dieLSI LOGIC CORP·Filed 1998·Granted Mar 21, 2000·11 cites·6 claims
- 2242US5568683AMethod of cooling a packaged electronic deviceLSI LOGIC CORP·Filed 1995·Granted Oct 29, 1996·8 cites·28 claims
- 2339US5981311AProcess for using a removeable plating bus layer for high density substratesLSI LOGIC CORP·Filed 1998·Granted Nov 9, 1999·8 cites·16 claims
- 2438US2006065983A1Semiconductor package with wire bond arrangement to reduce cross talk for high speed circuitsLSI LOGIC CORP·Filed 2004·Application pending·0 cites
- 2538US2006043565A1Laser removal of plating tails for high speed packagesCHIA CHOK J·Filed 2004·Application pending·0 cites
- 2633US6285077B1Multiple layer tape ball grid array packageLSI LOGIC CORP·Filed 1999·Granted Sep 4, 2001·3 cites·12 claims
- 2733US5973397ASemiconductor device and fabrication method which advantageously combine wire bonding and tab techniques to increase integrated circuit I/O pad densityLSI LOGIC CORP·Filed 1997·Granted Oct 26, 1999·3 cites·24 claims
- 2831US6603200B1Integrated circuit packageLSI LOGIC CORP·Filed 1997·Granted Aug 5, 2003·1 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →