Inventor · disambiguated record
Masahiro Kamoshida
Also filed as: KAMOSHIDA MASAHIRO
16 granted patents·1 pending application·249 citations·filing 1998–2014
94Inventor score
Top patents by PatentIndex Score
17 records- 0191US6313676B1Synchronous type semiconductor integrated circuit having a delay monitor controlled by a delay control signal obtained in a delay measuring modeTOSHIBA KK·Filed 2000·Granted Nov 6, 2001·66 cites·14 claims
- 0288US7439782B2Semiconductor integrated circuit device with power-on reset circuit for detecting the operating state of an analog circuitTOSHIBA KK·Filed 2006·Granted Oct 21, 2008·18 cites·9 claims
- 0384US8451648B2Resistance-change memory and method of operating the sameKAMOSHIDA MASAHIRO·Filed 2011·Granted May 28, 2013·12 cites·20 claims
- 0483US7233513B2Semiconductor memory device with MOS transistors each having floating gate and control gateTOSHIBA KK·Filed 2005·Granted Jun 19, 2007·15 cites·19 claims
- 0582US6292412B1Clock control circuitTOSHIBA KK·Filed 2000·Granted Sep 18, 2001·35 cites·21 claims
- 0672US6198690B1Clock control circuit with an input stop circuitTOSHIBA KK·Filed 2000·Granted Mar 6, 2001·21 cites·28 claims
- 0768US6084453AClock converting circuitTOSHIBA KK·Filed 1998·Granted Jul 4, 2000·22 cites·14 claims
- 0865US8644069B2Semiconductor memory deviceKAMOSHIDA MASAHIRO·Filed 2012·Granted Feb 4, 2014·2 cites·20 claims
- 0955US7016215B2Ferroelectric memory device with a spare memory cell arrayTOSHIBA KK·Filed 2003·Granted Mar 21, 2006·9 cites·8 claims
- 1055US6950361B2Nonvolatile semiconductor memory device using ferroelectric capacitorTOSHIBA KK·Filed 2004·Granted Sep 27, 2005·8 cites·20 claims
- 1153US6388484B1Clock control circuitTOSHIBA KK·Filed 1999·Granted May 14, 2002·12 cites·14 claims
- 1245US6885598B2Shared sense amplifier scheme semiconductor memory device and method of testing the sameTOSHIBA KK·Filed 2003·Granted Apr 26, 2005·4 cites·18 claims
- 1345US2015260779A1Semiconductor deviceTOSHIBA KK·Filed 2014·Application pending·0 cites
- 1443US6393080B1Apparatus comprising clock control circuit and device using internal clock signal synchronized to external clock signalTOSHIBA KK·Filed 1999·Granted May 21, 2002·16 cites·24 claims
- 1542US7193260B2Ferroelectric memory deviceTOSHIBA KK·Filed 2004·Granted Mar 20, 2007·1 cites·19 claims
- 1642US6292411B1Delay control circuit synchronous with clock signalTOSHIBA KK·Filed 2000·Granted Sep 18, 2001·3 cites·46 claims
- 1739US6473865B1Apparatus comprising clock control circuit, method of controlling clock signal and device using internal clock signal synchronized to external clock signalTOSHIBA KK·Filed 1999·Granted Oct 29, 2002·5 cites·33 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →