Inventor · disambiguated record
Daniel M. Mccarthy
Also filed as: MCCARTHY DANIEL · MCCARTHY DANIEL M
20 granted patents·725 citations·filing 1984–2017
95Inventor score
Files withCIRCELLO JOSEPH C5FREESCALE SEMICONDUCTOR INC4MOTOROLA INC4EDGCORE TECHNOLOGY INC1EDGE COMPUTER CORP1
Top patents by PatentIndex Score
20 records- 0191US5530804ASuperscalar processor with plural pipelined execution units each unit selectively having both normal and debug modesMOTOROLA INC·Filed 1994·Granted Jun 25, 1996·186 cites·42 claims
- 0287US8312253B2Data processor device having trace capabilities and methodCIRCELLO JOSEPH C·Filed 2008·Granted Nov 13, 2012·28 cites·17 claims
- 0386US10360162B2Processing systems and methods for transitioning between privilege states based on an address of a next instruction to be fetchedNXP USA INC·Filed 2017·Granted Jul 23, 2019·5 cites·14 claims
- 0485US7433803B2Performance monitor with precise start-stop controlFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Oct 7, 2008·16 cites·17 claims
- 0585US5276836AData processing device with common memory connecting mechanismHITACHI LTD·Filed 1991·Granted Jan 4, 1994·137 cites·4 claims
- 0684US4928225ACoherent cache structures and methodsEDGCORE TECHNOLOGY INC·Filed 1988·Granted May 22, 1990·83 cites·32 claims
- 0780US5761215AScan based path delay testing of integrated circuits containing embedded memory elementsMOTOROLA INC·Filed 1997·Granted Jun 2, 1998·49 cites·21 claims
- 0880US5029070ACoherent cache structures and methodsEDGE COMPUTER CORP·Filed 1988·Granted Jul 2, 1991·77 cites·18 claims
- 0974US9092647B2Programmable direct memory access channelsCIRCELLO JOSEPH C·Filed 2013·Granted Jul 28, 2015·3 cites·20 claims
- 1072US5485602AIntegrated circuit having a control signal for identifying coinciding active edges of two clock signalsMOTOROLA INC·Filed 1993·Granted Jan 16, 1996·56 cites·27 claims
- 1166US9672164B2Methods and systems for transitioning between a user state and a supervisor state based on a next instruction fetch addressMCCARTHY DANIEL M·Filed 2012·Granted Jun 6, 2017·3 cites·17 claims
- 1265US6766433B2System having user programmable addressing modes and method thereforFREESCALE SEMICONDUCTOR INC·Filed 2001·Granted Jul 20, 2004·16 cites·19 claims
- 1364US5666509AData processing system for performing either a precise memory access or an imprecise memory access based upon a logical address value and method thereofMOTOROLA INC·Filed 1994·Granted Sep 9, 1997·45 cites·20 claims
- 1457US8417924B2Data processing device and method of halting exception processingCIRCELLO JOSEPH C·Filed 2008·Granted Apr 9, 2013·1 cites·21 claims
- 1554US4680702AMerge control apparatus for a store into cache of a data processing systemHONEYWELL INF SYSTEMS·Filed 1984·Granted Jul 14, 1987·20 cites·8 claims
- 1653US9824242B2Programmable direct memory access channelsFREESCALE SEMICONDUCTOR INC·Filed 2015·Granted Nov 21, 2017·0 cites·18 claims
- 1746US9489316B2Method and device implementing execute-only memory protectionCIRCELLO JOSEPH C·Filed 2013·Granted Nov 8, 2016·0 cites·16 claims
- 1844US10002076B2Shared cache protocol for parallel search and replacementFREESCALE SEMICONDUCTOR INC·Filed 2015·Granted Jun 19, 2018·0 cites·10 claims
- 1941US10073797B2Data processor device supporting selectable exceptions and method thereofCIRCELLO JOSEPH C·Filed 2008·Granted Sep 11, 2018·0 cites·16 claims
- 2038US9201848B2Floating point matrix multiplication co-processorMCCARTHY DANIEL·Filed 2012·Granted Dec 1, 2015·0 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →