Inventor · disambiguated record
Reetuparna Das
Also filed as: DAS REETUPARNA
7 granted patents·3 pending applications·13 citations·filing 2013–2020
75Inventor score
Top patents by PatentIndex Score
10 records- 0186US9514074B2Single cycle arbitration within an interconnectUNIV MICHIGAN REGENTS·Filed 2013·Granted Dec 6, 2016·10 cites·20 claims
- 0265US10613866B2Method of detecting repetition of an out-of-order execution schedule, apparatus and computer-readable mediumUNIV MICHIGAN REGENTS·Filed 2017·Granted Apr 7, 2020·1 cites·18 claims
- 0360US9870226B2Control of switching between executed mechanismsUNIV MICHIGAN REGENTS·Filed 2014·Granted Jan 16, 2018·1 cites·19 claims
- 0455US2020234795A1Pruning Pair-HMM Algorithm And Hardware ArchitectureUNIV MICHIGAN REGENTS·Filed 2020·Application pending·0 cites
- 0555US2020234796A1Evaluating Optimality Of A Trace Generated During Sequence AlignmentUNIV MICHIGAN REGENTS·Filed 2020·Application pending·0 cites
- 0654US10037295B2Apparatus and methods for generating a selection signal to perform an arbitration in a single cycle between multiple signal inputs having respective data to sendUNIV MICHIGAN REGENTS·Filed 2016·Granted Jul 31, 2018·0 cites·16 claims
- 0752US9639363B2Heterogeneity within a processor coreLUKEFAHR ANDREW·Filed 2013·Granted May 2, 2017·1 cites·24 claims
- 0843US9965279B2Recording performance metrics to predict future execution of large instruction sequences on either high or low performance execution circuitryPADMANABHA SHRUTI·Filed 2013·Granted May 8, 2018·0 cites·20 claims
- 0941US2020265923A1Efficient Seeding For Read AlignmentUNIV MICHIGAN REGENTS·Filed 2020·Application pending·0 cites
- 1038US10310858B2Controlling transition between using first and second processing circuitryUNIV MICHIGAN REGENTS·Filed 2016·Granted Jun 4, 2019·0 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →