Inventor · disambiguated record
Kevin Arthur Chiarot
Also filed as: CHIAROT KEVIN A · CHIAROT KEVIN ARTHUR
9 granted patents·229 citations·filing 1991–2000
90Inventor score
Technology areasG06F
Files withIBM9
Top patents by PatentIndex Score
9 records- 0166US6332181B1Recovery mechanism for L1 data cache parity errorsIBM·Filed 1998·Granted Dec 18, 2001·52 cites·10 claims
- 0259US6148394AApparatus and method for tracking out of order load instructions to avoid data coherency violations in a processorIBM·Filed 1998·Granted Nov 14, 2000·37 cites·7 claims
- 0358US5721864APrefetching instructions between cachesIBM·Filed 1995·Granted Feb 24, 1998·37 cites·15 claims
- 0455US6622236B1Microprocessor instruction fetch unit for processing instruction groups having multiple branch instructionsIBM·Filed 2000·Granted Sep 16, 2003·6 cites·24 claims
- 0551US6035394ASystem for providing high performance speculative processing of complex load/store instructions by generating primitive instructions in the load/store unit and sequencer in parallelIBM·Filed 1998·Granted Mar 7, 2000·25 cites·20 claims
- 0650US6061785AData processing system having an apparatus for out-of-order register operations and method thereforIBM·Filed 1998·Granted May 9, 2000·24 cites·21 claims
- 0743US5860150AInstruction pre-fetching of a cache line within a processorIBM·Filed 1995·Granted Jan 12, 1999·17 cites·24 claims
- 0843US5390312AAccess look-aside facilityIBM·Filed 1994·Granted Feb 14, 1995·18 cites·8 claims
- 0939US5319761ADirectory look-aside table for a virtual storage system including means for minimizing synonym entriesIBM·Filed 1991·Granted Jun 7, 1994·13 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →