Inventor · disambiguated record
Vesselina K. Papazova
Also filed as: PAPAZOVA VESSELINA · PAPAZOVA VESSELINA K · PAPAZOVA VESSELINA KIRILOVA
41 granted patents·1 pending application·481 citations·filing 2006–2022
97Inventor score
Technology areasG06F
Top patents by PatentIndex Score
42 records- 0199US8775858B2Heterogeneous recovery in a redundant memory systemIBM·Filed 2013·Granted Jul 8, 2014·297 cites·5 claims
- 0297US8832324B1First-in-first-out queue-based command spreadingIBM·Filed 2013·Granted Sep 9, 2014·68 cites·20 claims
- 0390US9495231B2Reestablishing synchronization in a memory systemIBM·Filed 2016·Granted Nov 15, 2016·6 cites·1 claims
- 0489US9146864B2Address mapping including generic bits for universal addressing independent of memory typeIBM·Filed 2013·Granted Sep 29, 2015·12 cites·19 claims
- 0587US10339064B2Hot cache line arbitrationIBM·Filed 2017·Granted Jul 2, 2019·5 cites·20 claims
- 0687US9318171B2Dual asynchronous and synchronous memory systemIBM·Filed 2014·Granted Apr 19, 2016·8 cites·12 claims
- 0787US9142272B2Dual asynchronous and synchronous memory systemIBM·Filed 2013·Granted Sep 22, 2015·9 cites·8 claims
- 0886US8423736B2Maintaining cache coherence in a multi-node, symmetric multiprocessing computerBLAKE MICHAEL A·Filed 2010·Granted Apr 16, 2013·10 cites·18 claims
- 0985US11853212B2Preemptive tracking of remote requests for decentralized hot cache line fairness trackingIBM·Filed 2022·Granted Dec 26, 2023·1 cites·20 claims
- 1084US11868259B2System coherency protocolIBM·Filed 2022·Granted Jan 9, 2024·1 cites·21 claims
- 1183US10628313B2Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cacheIBM·Filed 2017·Granted Apr 21, 2020·3 cites·8 claims
- 1282US10489294B2Hot cache line fairness arbitration in distributed modular SMP systemIBM·Filed 2017·Granted Nov 26, 2019·3 cites·18 claims
- 1380US10572385B2Granting exclusive cache access using locality cache coherency stateIBM·Filed 2017·Granted Feb 25, 2020·2 cites·20 claims
- 1480US9104564B2Early data delivery prior to error detection completionIBM·Filed 2014·Granted Aug 11, 2015·4 cites·12 claims
- 1579US10628314B2Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cacheIBM·Filed 2017·Granted Apr 21, 2020·2 cites·6 claims
- 1679US8631271B2Heterogeneous recovery in a redundant memory systemGOWER KEVIN C·Filed 2010·Granted Jan 14, 2014·6 cites·12 claims
- 1777US10915461B2Multilevel cache eviction managementIBM·Filed 2019·Granted Feb 9, 2021·2 cites·14 claims
- 1877US10802966B2Simultaneous, non-atomic request processing within an SMP environment broadcast scope for multiply-requested data elements using real-time parallelizationIBM·Filed 2019·Granted Oct 13, 2020·2 cites·20 claims
- 1975US9003127B2Storing data in a system memory for a subsequent cache flushIBM·Filed 2013·Granted Apr 7, 2015·3 cites·9 claims
- 2075US8769335B2Homogeneous recovery in a redundant memory systemIBM·Filed 2013·Granted Jul 1, 2014·3 cites·6 claims
- 2174US8762651B2Maintaining cache coherence in a multi-node, symmetric multiprocessing computerBLAKE MICHAEL A·Filed 2010·Granted Jun 24, 2014·4 cites·17 claims
- 2273US8898511B2Homogeneous recovery in a redundant memory systemLASTRAS-MONTANO LUIS A·Filed 2010·Granted Nov 25, 2014·3 cites·15 claims
- 2373US7934059B2Method, system and computer program product for preventing lockout and stalling conditions in a multi-node system with speculative memory fetchingIBM·Filed 2008·Granted Apr 26, 2011·6 cites·20 claims
- 2472US9852071B2Granting exclusive cache access using locality cache coherency stateIBM·Filed 2014·Granted Dec 26, 2017·2 cites·20 claims
- 2570US9092330B2Early data delivery prior to error detection completionIBM·Filed 2013·Granted Jul 28, 2015·2 cites·8 claims
- 2669US8250308B2Cache coherency protocol with built in avoidance for conflicting responsesPAPAZOVA VESSELINA K·Filed 2008·Granted Aug 21, 2012·7 cites·19 claims
- 2768US9798663B2Granting exclusive cache access using locality cache coherency stateIBM·Filed 2015·Granted Oct 24, 2017·1 cites·10 claims
- 2868US8560776B2Method for expediting return of line exclusivity to a given processor in a symmetric multiprocessing data processing systemDRAPALA GARRETT M·Filed 2008·Granted Oct 15, 2013·4 cites·20 claims
- 2967US9037811B2Tagging in memory control unit (MCU)IBM·Filed 2013·Granted May 19, 2015·2 cites·17 claims
- 3062US7685345B2Apparatus and method for fairness arbitration for a shared pipeline in a large SMP computer systemIBM·Filed 2007·Granted Mar 23, 2010·3 cites·20 claims
- 3157US10489292B2Ownership tracking updates across multiple simultaneous operationsIBM·Filed 2017·Granted Nov 26, 2019·0 cites·6 claims
- 3257US9594646B2Reestablishing synchronization in a memory systemIBM·Filed 2016·Granted Mar 14, 2017·0 cites·1 claims
- 3355US11042483B2Efficient eviction of whole set associated cache or selected range of addressesIBM·Filed 2019·Granted Jun 22, 2021·0 cites·20 claims
- 3455US10482015B2Ownership tracking updates across multiple simultaneous operationsIBM·Filed 2017·Granted Nov 19, 2019·0 cites·11 claims
- 3555US9535778B2Reestablishing synchronization in a memory systemIBM·Filed 2013·Granted Jan 3, 2017·0 cites·10 claims
- 3651US2024061803A1Serialized broadcast command messaging in a distributed symmetric multiprocessing (smp) systemIBM·Filed 2022·Application pending·0 cites
- 3750US8990507B2Storing data in a system memory for a subsequent cache flushBLAKE MICHAEL A·Filed 2012·Granted Mar 24, 2015·0 cites·5 claims
- 3850US8001328B2Method and process for expediting the return of line exclusivity to a given processor through enhanced inter-node communicationsIBM·Filed 2008·Granted Aug 16, 2011·0 cites·17 claims
- 3947US8131937B2Apparatus and method for improved data persistence within a multi-node systemBLAKE MICHAEL A·Filed 2007·Granted Mar 6, 2012·0 cites·20 claims
- 4047US7523267B2Method for ensuring fairness among requests within a multi-node computer systemIBM·Filed 2006·Granted Apr 21, 2009·0 cites·12 claims
- 4146US10380020B2Achieving high bandwidth on ordered direct memory access write stream into a processor cacheIBM·Filed 2017·Granted Aug 13, 2019·0 cites·17 claims
- 4243US9678873B2Early shared resource release in symmetric multiprocessing computer systemsIBM·Filed 2015·Granted Jun 13, 2017·0 cites·15 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →