Inventor · disambiguated record
Purva Choudhary
Also filed as: CHOUDHARY PURVA
4 granted patents·1 citations·filing 2022–2024
57Inventor score
Technology areasH03L
Files withSHAOXING YUANFANG SEMICONDUCTOR CO LTD4
Top patents by PatentIndex Score
4 records- 0177US12261609B1Inter-PLL communication in a multi-PLL environmentSHAOXING YUANFANG SEMICONDUCTOR CO LTD·Filed 2023·Granted Mar 25, 2025·1 cites·20 claims
- 0266US12149255B2Generating divided signals from phase-locked loop (PLL) output when reference clock is unavailableSHAOXING YUANFANG SEMICONDUCTOR CO LTD·Filed 2024·Granted Nov 19, 2024·0 cites·6 claims
- 0358US11967965B2Generating divided signals from phase-locked loop (PLL) output when reference clock is unavailableSHAOXING YUANFANG SEMICONDUCTOR CO LTD·Filed 2022·Granted Apr 23, 2024·0 cites·13 claims
- 0436US11923864B2Fast switching of output frequency of a phase locked loop (PLL)SHAOXING YUANFANG SEMICONDUCTOR CO LTD·Filed 2022·Granted Mar 5, 2024·0 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →