Inventor · disambiguated record
Jiale Liang
Also filed as: LIANG JIALE
3 granted patents·2 pending applications·3 citations·filing 2010–2025
56Inventor score
Top patents by PatentIndex Score
5 records- 0170US8698245B2Partially depleted (PD) semiconductor-on-insulator (SOI) field effect transistor (FET) structure with a gate-to-body tunnel current region for threshold voltage (VT) lowering and method of forming the structureANDERSON BRENT A·Filed 2010·Granted Apr 15, 2014·2 cites·20 claims
- 0265US8809954B2Partially depleted (PD) semiconductor-on-insulator (SOI) field effect transistor (FET) structure with a gate-to-body tunnel current region for threshold voltage (Vt) lowering and method of forming the structureIBM·Filed 2014·Granted Aug 19, 2014·1 cites·20 claims
- 0365US2025278111A1Transient current-mode signaling scheme for on-chip interconnect fabricsNVIDIA CORP·Filed 2025·Application pending·0 cites
- 0461US12339700B2Transient current-mode signaling scheme for on-chip interconnect fabricsNVIDIA CORP·Filed 2023·Granted Jun 24, 2025·0 cites·17 claims
- 0550US2025004522A1Circuit to protect against multi-rail voltage glitching attacksNVIDIA CORP·Filed 2023·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →