Inventor · disambiguated record
Leonid Fleshel
Also filed as: FLESHEL LEONID
14 granted patents·2 pending applications·20 citations·filing 2009–2013
86Inventor score
Top patents by PatentIndex Score
16 records- 0182US9112489B2Sequential logic circuit and method of providing setup timing violation tolerance thereforPRIEL MICHAEL·Filed 2012·Granted Aug 18, 2015·6 cites·17 claims
- 0281US9431338B2Bypass capacitor circuit and method of providing a bypass capacitance for an integrated circuit diePRIEL MICHAEL·Filed 2009·Granted Aug 30, 2016·7 cites·20 claims
- 0362US9178730B2Clock distribution module, synchronous digital system and method thereforPRIEL MICHAEL·Filed 2012·Granted Nov 3, 2015·2 cites·20 claims
- 0462US8901986B2Integrated circuit and a method of power management of an integrated circuitROZEN ANTON·Filed 2010·Granted Dec 2, 2014·1 cites·20 claims
- 0557US8228080B2Device and method for current estimationPRIEL MICHAEL·Filed 2009·Granted Jul 24, 2012·2 cites·20 claims
- 0652US9799379B2Hold time aware register file module and method thereforPRIEL MICHAEL·Filed 2012·Granted Oct 24, 2017·1 cites·20 claims
- 0752US7941721B2System and a method for testing connectivity between a first device and a second deviceFREESCALE SEMICONDUCTOR INC·Filed 2009·Granted May 10, 2011·1 cites·20 claims
- 0845US9906355B2On-die signal measurement circuit and methodPRIEL MICHAEL·Filed 2013·Granted Feb 27, 2018·0 cites·14 claims
- 0945US9606064B2Method of detecting irregular current flow in an integrated circuit device and apparatus thereforROZEN ANTON·Filed 2012·Granted Mar 28, 2017·0 cites·15 claims
- 1045US9500679B2System and method for on-die voltage difference measurement on a pass device, and integrated circuitPRIEL MICHAEL·Filed 2012·Granted Nov 22, 2016·0 cites·12 claims
- 1144US9075421B2Integrated circuit device, voltage regulator module and method for compensating a voltage signalPRIEL MICHAEL·Filed 2011·Granted Jul 7, 2015·0 cites·20 claims
- 1240US9092163B2Method, integrated circuit and electronic device for compensating a timing signal based at least partly on determining a number of state transitions between a current set of data states and the next set of data statesPRIEL MICHAEL·Filed 2009·Granted Jul 28, 2015·0 cites·18 claims
- 1339US2013002334A1Integrated circuit, electronic device and method for configuring a signal path for a timing sensitive signalFREESCALE SEMICONDUCTOR INC·Filed 2010·Application pending·0 cites
- 1437US9651618B2Electronic device and method for state retentionPRIEL MICHAEL·Filed 2013·Granted May 16, 2017·0 cites·20 claims
- 1535US8598949B2Electronic circuit and method for state retention power gatingPRIEL MICHAEL·Filed 2010·Granted Dec 3, 2013·0 cites·20 claims
- 1635US2014021557A1Apparatus for forward well bias in a semiconductor integrated circuitPRIEL MICHAEL·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →