Inventor · disambiguated record
Vincent E. Vonbokern
Also filed as: VONBOKERN VINCENT · VONBOKERN VINCENT E
10 granted patents·548 citations·filing 1997–1999
93Inventor score
Files withINTEL CORP10
Top patents by PatentIndex Score
10 records- 0192US6192455B1Apparatus and method for preventing access to SMRAM space through AGP addressingINTEL CORP·Filed 1998·Granted Feb 20, 2001·193 cites·19 claims
- 0282US6173217B1Method and apparatus to control core logic temperatureINTEL CORP·Filed 1997·Granted Jan 9, 2001·44 cites·58 claims
- 0378US5953685AMethod and apparatus to control core logic temperatureINTEL CORP·Filed 1997·Granted Sep 14, 1999·71 cites·50 claims
- 0475US6470238B1Method and apparatus to control device temperatureINTEL CORP·Filed 1999·Granted Oct 22, 2002·79 cites·56 claims
- 0566US6181619B1Selective automatic precharge of dynamic random access memory banksINTEL CORP·Filed 1998·Granted Jan 30, 2001·23 cites·20 claims
- 0659US6314472B1Abort of DRAM read ahead when PCI read multiple has endedINTEL CORP·Filed 1998·Granted Nov 6, 2001·34 cites·23 claims
- 0759US6049887AMethod and apparatus for propagating a signal between synchronous clock domains operating at a non-integer frequency ratioINTEL CORP·Filed 1997·Granted Apr 11, 2000·40 cites·29 claims
- 0851US5961649AMethod and apparatus for propagating a signal between synchronous clock domains operating at a non-integer frequency ratioINTEL CORP·Filed 1997·Granted Oct 5, 1999·28 cites·23 claims
- 0949US6784890B1Accelerated graphics port expedite cycle throttling control mechanismINTEL CORP·Filed 1998·Granted Aug 31, 2004·23 cites·42 claims
- 1041US6157397AAGP read and CPU wire coherencyINTEL CORP·Filed 1998·Granted Dec 5, 2000·13 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →