Inventor · disambiguated record
Seshadri Subbanna
Also filed as: SUBBANNA SESHADRI
35 granted patents·3 pending applications·1,804 citations·filing 1991–2016
98Inventor score
Top patents by PatentIndex Score
38 records- 0198US9643181B1Integrated microfluidics systemIBM·Filed 2016·Granted May 9, 2017·28 cites·20 claims
- 0297US5293050ASemiconductor quantum dot light emitting/detecting devicesIBM·Filed 1993·Granted Mar 8, 1994·333 cites·5 claims
- 0396US6635506B2Method of fabricating micro-electromechanical switches on CMOS compatible substratesIBM·Filed 2001·Granted Oct 21, 2003·155 cites·15 claims
- 0496US5354707AMethod of making semiconductor quantum dot light emitting/detecting devicesIBM·Filed 1993·Granted Oct 11, 1994·280 cites·12 claims
- 0591US6344125B1Pattern-sensitive electrolytic metal platingIBM·Filed 2000·Granted Feb 5, 2002·56 cites·20 claims
- 0689US6858532B2Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related toolingIBM·Filed 2002·Granted Feb 22, 2005·44 cites·19 claims
- 0789US6368484B1Selective plating processIBM·Filed 2000·Granted Apr 9, 2002·56 cites·15 claims
- 0888US5268324AModified silicon CMOS process having selectively deposited Si/SiGe FETSIBM·Filed 1992·Granted Dec 7, 1993·79 cites·8 claims
- 0986US5807788AMethod for selective deposition of refractory metal and device formed therebyIBM·Filed 1996·Granted Sep 15, 1998·72 cites·19 claims
- 1085US6800503B2MEMS encapsulated structure and method of making sameIBM·Filed 2002·Granted Oct 5, 2004·38 cites·31 claims
- 1185US6798029B2Method of fabricating micro-electromechanical switches on CMOS compatible substratesIBM·Filed 2003·Granted Sep 28, 2004·28 cites·11 claims
- 1285US6661069B1Micro-electromechanical varactor with enhanced tuning rangeIBM·Filed 2002·Granted Dec 9, 2003·48 cites·13 claims
- 1385US6414371B1Process and structure for 50+ gigahertz transistorIBM·Filed 2000·Granted Jul 2, 2002·38 cites·22 claims
- 1483US5485032AAntifuse element with electrical or optical programmingIBM·Filed 1994·Granted Jan 16, 1996·61 cites·18 claims
- 1580US6777302B1Nitride pedestal for raised extrinsic base HBT processIBM·Filed 2003·Granted Aug 17, 2004·27 cites·20 claims
- 1680US5338698AMethod of fabricating an ultra-short channel field effect transistorIBM·Filed 1992·Granted Aug 16, 1994·45 cites·8 claims
- 1779US5194397AMethod for controlling interfacial oxide at a polycrystalline/monocrystalline silicon interfaceIBM·Filed 1991·Granted Mar 16, 1993·76 cites·23 claims
- 1878US6780695B1BiCMOS integration scheme with raised extrinsic baseIBM·Filed 2003·Granted Aug 24, 2004·24 cites·17 claims
- 1978US5612255AOne dimensional silicon quantum wire devices and the method of manufacture thereofIBM·Filed 1995·Granted Mar 18, 1997·63 cites·13 claims
- 2075US5789286AMethod of making a CMOS structure with FETS having isolated wells with merged depletionsIBM·Filed 1997·Granted Aug 4, 1998·32 cites·9 claims
- 2173US5266504ALow temperature emitter process for high performance bipolar devicesIBM·Filed 1992·Granted Nov 30, 1993·53 cites·14 claims
- 2272US6472288B2Method of fabricating bipolar transistors with independent impurity profile on the same chipIBM·Filed 2000·Granted Oct 29, 2002·21 cites·15 claims
- 2371US6927476B2Bipolar device having shallow junction raised extrinsic base and method for making the sameIBM·Filed 2001·Granted Aug 9, 2005·16 cites·34 claims
- 2468US7053460B2Multi-level RF passive deviceIBM·Filed 2001·Granted May 30, 2006·15 cites·12 claims
- 2568US6696343B1Micro-electromechanical varactor with enhanced tuning rangeIBM·Filed 2003·Granted Feb 24, 2004·16 cites·16 claims
- 2664US6800921B1Method of fabricating a polysilicon capacitor utilizing fet and bipolar base polysilicon layersIBM·Filed 2000·Granted Oct 5, 2004·9 cites·7 claims
- 2763US6429500B1Semiconductor pin diode for high frequency applicationsIBM·Filed 2000·Granted Aug 6, 2002·11 cites·13 claims
- 2861US6426547B1Lateral polysilicon pin diode and method for so fabricatingINFORMATION BUSINESS MACHINES·Filed 2000·Granted Jul 30, 2002·13 cites·18 claims
- 2960US6670228B2Method of fabricating a polysilicon capacitor utilizing FET and bipolar base polysilicon layersIBM·Filed 2003·Granted Dec 30, 2003·7 cites·23 claims
- 3060US5731619ACMOS structure with FETS having isolated wells with merged depletions and methods of making sameIBM·Filed 1996·Granted Mar 24, 1998·17 cites·9 claims
- 3157US6933186B2Method for BEOL resistor tolerance improvement using anodic oxidationIBM·Filed 2001·Granted Aug 23, 2005·7 cites·18 claims
- 3252US5294558AMethod of making double-self-aligned bipolar transistor structureIBM·Filed 1993·Granted Mar 15, 1994·15 cites·2 claims
- 3350US6448124B1Method for epitaxial bipolar BiCMOSIBM·Filed 1999·Granted Sep 10, 2002·16 cites·25 claims
- 3439US2012295417A1Selective epitaxial growth by incubation time engineeringADAM THOMAS N·Filed 2011·Application pending·0 cites
- 3537US2004077140A1Apparatus and method for forming uniformly thick anodized films on large substratesFiled 2002·Application pending·0 cites
- 3635US6375859B1Process for resist clean up of metal structures on polyimideIBM·Filed 1999·Granted Apr 23, 2002·4 cites·25 claims
- 3734US2002197807A1Non-self-aligned SiGe heterojunction bipolar transistorIBM·Filed 2001·Application pending·0 cites
- 3831US6049131ADevice formed by selective deposition of refractory metal of less than 300 Angstroms of thicknessIBM·Filed 1997·Granted Apr 11, 2000·1 cites·3 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →