Inventor · disambiguated record
Chuang Chihchous
Also filed as: CHIHCHOUS CHUANG
4 granted patents·2 pending applications·1 citations·filing 2020–2024
60Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD6
Top patents by PatentIndex Score
6 records- 0187US12195866B2Plating membraneTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jan 14, 2025·0 cites·20 claims
- 0286US2025101628A1Plating membraneTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0382US11562923B2Semiconductor arrangement including a first electrical insulator layer and a second electrical insulator layer and method of makingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jan 24, 2023·1 cites·20 claims
- 0477US2024371680A1Semiconductor arrangement and method of makingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0574US12094756B2Semiconductor arrangement comprising isolation structure comprising at least two electrical insulator layersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Sep 17, 2024·0 cites·20 claims
- 0673US11814743B2Plating membraneTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 14, 2023·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →