Inventor · disambiguated record
Yu-Shiang Yang
Also filed as: YANG YU-SHIANG
10 granted patents·1 pending application·26 citations·filing 2008–2015
85Inventor score
Top patents by PatentIndex Score
11 records- 0187US8151221B2Method to compensate optical proximity correctionHUANG CHUN-HSIEN·Filed 2010·Granted Apr 3, 2012·6 cites·5 claims
- 0279US8321820B2Method to compensate optical proximity correctionHUANG CHUN-HSIEN·Filed 2012·Granted Nov 27, 2012·3 cites·5 claims
- 0377US8146025B2Method for correcting layout pattern using rule checking rectangleYANG YU-SHIANG·Filed 2009·Granted Mar 27, 2012·8 cites·5 claims
- 0467US8962221B2Mask and method of forming pattern by using the sameYANG YU-SHIANG·Filed 2012·Granted Feb 24, 2015·1 cites·11 claims
- 0566US7943274B2Mask pattern correction and layout methodUNITED MICROELECTRONICS CORP·Filed 2008·Granted May 17, 2011·2 cites·18 claims
- 0665US8321822B2Method and computer-readable medium of optical proximity correctionYANG YU-SHIANG·Filed 2010·Granted Nov 27, 2012·2 cites·10 claims
- 0761US8042069B2Method for selectively amending layout patternsUNITED MICROELECTRONICS CORP·Filed 2008·Granted Oct 18, 2011·3 cites·36 claims
- 0860US7797656B2Method of checking and correcting mask patternUNITED MICROELECTRONICS CORP·Filed 2008·Granted Sep 14, 2010·1 cites·14 claims
- 0950US9268209B2Mask and method of forming pattern by using the sameUNITED MICROELECTRONICS CORP·Filed 2015·Granted Feb 23, 2016·0 cites·9 claims
- 1046US2012131521A1Layout patternYANG YU-SHIANG·Filed 2012·Application pending·0 cites
- 1143US9171898B2Method for manufacturing semiconductor layout pattern, method for manufacturing semiconductor device, and semiconductor deviceUNITED MICROELECTRONICS CORP·Filed 2012·Granted Oct 27, 2015·0 cites·19 claims
Join the waitlist — get patent alerts
Get an alert when Yu-Shiang Yang files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →