Inventor · disambiguated record
Jason M. Norman
Also filed as: NORMAN JASON · NORMAN JASON M · NORMAN JASON MICHAEL
19 granted patents·14 pending applications·108 citations·filing 2002–2018
93Inventor score
Top patents by PatentIndex Score
33 records- 0187US8539404B2Functional simulation redundancy reduction by state comparison and pruningCRAIG JESSE E·Filed 2011·Granted Sep 17, 2013·15 cites·20 claims
- 0282US7643591B2Transition balancing for noise reduction /Di/Dt reduction during design, synthesis, and physical designIBM·Filed 2006·Granted Jan 5, 2010·10 cites·20 claims
- 0382US7085993B2System and method for correcting timing signals in integrated circuitsIBM·Filed 2002·Granted Aug 1, 2006·38 cites·18 claims
- 0478US7519941B2Method of manufacturing integrated circuits using pre-made and pre-qualified exposure masks for selected blocks of circuitryIBM·Filed 2006·Granted Apr 14, 2009·5 cites·16 claims
- 0577US7823107B2Transition balancing for noise reduction/Di/Dt reduction during design, synthesis, and physical designIBM·Filed 2007·Granted Oct 26, 2010·8 cites·20 claims
- 0673US7248838B2Wireless communication system within a system on a chipIBM·Filed 2006·Granted Jul 24, 2007·4 cites·17 claims
- 0771US8347019B2Structure for hardware assisted bus state transition circuit using content addressable memoriesIBM·Filed 2008·Granted Jan 1, 2013·5 cites·25 claims
- 0863US6934656B2Auto-linking of function logic state with testcase regression listIBM·Filed 2003·Granted Aug 23, 2005·9 cites·18 claims
- 0962US7898286B2Critical path redundant logic for mitigation of hardware across chip variationIBM·Filed 2009·Granted Mar 1, 2011·3 cites·20 claims
- 1060US7308663B2Circuit design verification using checkpointingIBM·Filed 2005·Granted Dec 11, 2007·2 cites·34 claims
- 1158US7313738B2System and method for system-on-chip interconnect verificationIBM·Filed 2005·Granted Dec 25, 2007·1 cites·12 claims
- 1256US7865789B2System and method for system-on-chip interconnect verificationIBM·Filed 2007·Granted Jan 4, 2011·2 cites·18 claims
- 1353US7275011B2Method and apparatus for monitoring integrated circuit temperature through deterministic path delaysIBM·Filed 2005·Granted Sep 25, 2007·2 cites·16 claims
- 1453US7103320B2Wireless communication system within a system on a chipIBM·Filed 2003·Granted Sep 5, 2006·2 cites·20 claims
- 1548US7743270B2Assigning clock arrival time for noise reductionIBM·Filed 2006·Granted Jun 22, 2010·0 cites·14 claims
- 1648US7286770B2Fiber optic transmission lines on an SOCIBM·Filed 2003·Granted Oct 23, 2007·2 cites·8 claims
- 1748US2009132747A1Structure for universal peripheral processor system for soc environments on an integrated circuitIBM·Filed 2008·Application pending·0 cites
- 1847US2008278195A1Structure for executing software within real-time hardware constraints using functionally programmable branch tableIBM·Filed 2008·Application pending·0 cites
- 1947US2009132732A1Universal peripheral processor system for soc environments on an integrated circuitIBM·Filed 2007·Application pending·0 cites
- 2046US2008212977A1Fiber optic transmission lines on an socDOYLE GARY R·Filed 2007·Application pending·0 cites
- 2145US2008183941A1Hardware assisted bus state transition using content addressable memories.IBM·Filed 2007·Application pending·0 cites
- 2245US2006095905A1Method and apparatus for servicing threads within a multi-processor systemIBM·Filed 2004·Application pending·0 cites
- 2345US2006041705A1System and method for arbitration between shared peripheral core devices in system on chip architecturesIBM·Filed 2004·Application pending·0 cites
- 2444US7139881B2Semiconductor device comprising a plurality of memory structuresIBM·Filed 2003·Granted Nov 21, 2006·0 cites·22 claims
- 2544US2008046772A1Shifting inactive clock edge for noise reductionIBM·Filed 2006·Application pending·0 cites
- 2643US7091743B2Data acknowledgment using impedance mismatchingIBM·Filed 2003·Granted Aug 15, 2006·0 cites·18 claims
- 2742US2007101332A1Method and apparatus for resource-based thread allocation in a multiprocessor computer systemIBM·Filed 2005·Application pending·0 cites
- 2841US2006262779A1A method and apparatus for transferring data between cores in an integrated circuitIBM·Filed 2005·Application pending·0 cites
- 2940US2008282072A1Executing Software Within Real-Time Hardware Constraints Using Functionally Programmable Branch TableLEONARD TODD E·Filed 2007·Application pending·0 cites
- 3039US10754790B2Translation of virtual addresses to physical addresses using translation lookaside buffer informationQUALCOMM INC·Filed 2018·Granted Aug 25, 2020·0 cites·24 claims
- 3138US2019087351A1Transaction dispatcher for memory management unitQUALCOMM INC·Filed 2018·Application pending·0 cites
- 3238US2009102529A1Shifting inactive clock edge for noise reductionIBM·Filed 2007·Application pending·0 cites
- 3332US2019286718A1Data structure with rotating bloom filtersQUALCOMM INC·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →