Inventor · disambiguated record
Timothy P. Layman
Also filed as: LAYMAN TIMOTHY P
4 granted patents·294 citations·filing 1993–1999
82Inventor score
Top patents by PatentIndex Score
4 records- 0191US5307477ATwo-level cache memory systemMIPS COMPUTER SYSTEMS INC·Filed 1993·Granted Apr 26, 1994·152 cites·5 claims
- 0283US5542062ACache memory system employing virtual address primary instruction and data caches and physical address secondary cacheSILICON GRAPHICS INC·Filed 1993·Granted Jul 30, 1996·84 cites·11 claims
- 0371US5699551ASoftware invalidation in a multiple level, multiple cache systemSILICON GRAPHICS INC·Filed 1995·Granted Dec 16, 1997·51 cites·6 claims
- 0435US6281108B1System and method to provide power to a sea of gates standard cell block from an overhead bump gridSILICON GRAPHICS INC·Filed 1999·Granted Aug 28, 2001·7 cites·20 claims
Join the waitlist — get patent alerts
Get an alert when Timothy P. Layman files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →