Inventor · disambiguated record

Robert J. Baryla

Also filed as: BARYLA ROBERT J

4 granted patents·44 citations·filing 1996–2003

73Inventor score

Technology areasG06F

Files withBULL HN INFORMATION SYST4

Top patents by PatentIndex Score

4 records

0143US6006309AInformation block transfer management in a multiprocessor computer system employing private caches for individual center processor units and a shared cacheBULL HN INFORMATION SYST·Filed 1996·Granted Dec 21, 1999·18 cites·5 claims
0242US6970977B2Equal access to prevent gateword dominance in a multiprocessor write-into-cache environmentBULL HN INFORMATION SYST·Filed 2003·Granted Nov 29, 2005·0 cites·6 claims
0342US5829029APrivate cache miss and access management in a multiprocessor system with shared memoryBULL HN INFORMATION SYST·Filed 1996·Granted Oct 27, 1998·17 cites·3 claims
0431US5963973AMultiprocessor computer system incorporating method and apparatus for dynamically assigning ownership of changeable dataBULL HN INFORMATION SYST·Filed 1997·Granted Oct 5, 1999·9 cites·10 claims

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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →