Inventor · disambiguated record
David B. Fite, Jr.
Also filed as: FITE DAVID B · FITE JR DAVID B
21 granted patents·1,666 citations·filing 1988–2002
97Inventor score
Files withDIGITAL EQUIPMENT CORP14NORTEL NETWORKS LTD4CABLETRON SYSTEM INC1CABLETRON SYSTEMS INC1NORTEL NETWORKS CORP1
Top patents by PatentIndex Score
21 records- 0196US5142634ABranch predictionDIGITAL EQUIPMENT CORP·Filed 1989·Granted Aug 25, 1992·276 cites·47 claims
- 0293US4888679AMethod and apparatus using a cache and main memory for both vector processing and scalar processing by prefetching cache blocks including vector data elementsDIGITAL EQUIPMENT CORP·Filed 1988·Granted Dec 19, 1989·151 cites·31 claims
- 0390US4985825ASystem for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computerDIGITAL EQUIPMENT CORP·Filed 1989·Granted Jan 15, 1991·128 cites·11 claims
- 0488US5519841AMulti instruction register mapperDIGITAL EQUIPMENT CORP·Filed 1992·Granted May 21, 1996·134 cites·18 claims
- 0587US6496502B1Distributed multi-link trunking method and apparatusNORTEL NETWORKS LTD·Filed 1998·Granted Dec 17, 2002·172 cites·14 claims
- 0687US5109495AMethod and apparatus using a source operand list and a source operand pointer queue between the execution unit and the instruction decoding and operand processing units of a pipelined data processorDIGITAL EQUIPMENT CORP·Filed 1989·Granted Apr 28, 1992·105 cites·19 claims
- 0786US5125083AMethod and apparatus for resolving a variable number of potential memory access conflicts in a pipelined computer systemDIGITAL EQUIPMENT CORP·Filed 1989·Granted Jun 23, 1992·91 cites·16 claims
- 0882US6490276B1Stackable switch port collapse mechanismNORTEL NETWORKS LTD·Filed 1998·Granted Dec 3, 2002·59 cites·8 claims
- 0980US5113515AVirtual instruction cache system using length responsive decoded instruction shifting and merging with prefetch buffer outputs to fill instruction bufferDIGITAL EQUIPMENT CORP·Filed 1989·Granted May 12, 1992·67 cites·9 claims
- 1078US5148528AMethod and apparatus for simultaneously decoding three operands in a variable length instruction when one of the operands is also of variable lengthDIGITAL EQUIPMENT CORP·Filed 1989·Granted Sep 15, 1992·59 cites·31 claims
- 1176US5142633APreprocessing implied specifiers in a pipelined processorDIGITAL EQUIPMENT CORP·Filed 1989·Granted Aug 25, 1992·57 cites·20 claims
- 1274US5142631ASystem for queuing individual read or write mask and generating respective composite mask for controlling access to general purpose registerDIGITAL EQUIPMENT CORP·Filed 1989·Granted Aug 25, 1992·54 cites·27 claims
- 1373US5167026ASimultaneously or sequentially decoding multiple specifiers of a variable length pipeline instruction based on detection of modified value of specifier registersDIGITAL EQUIPMENT CORP·Filed 1989·Granted Nov 24, 1992·53 cites·8 claims
- 1471US6252888B1Method and apparatus providing network communications between devices using frames with multiple formatsNORTEL NETWORKS CORP·Filed 1998·Granted Jun 26, 2001·75 cites·34 claims
- 1570US5619662AMemory reference taggingDIGITAL EQUIPMENT CORP·Filed 1994·Granted Apr 8, 1997·52 cites·16 claims
- 1668US7463625B2Stackable switch port collapse mechanismNORTEL NETWORKS LTD·Filed 2002·Granted Dec 9, 2008·6 cites·16 claims
- 1768US5349651ASystem for translation of virtual to physical addresses by operating memory management processor for calculating location of physical address in memory concurrently with cache comparing virtual addresses for translationDIGITAL EQUIPMENT CORP·Filed 1991·Granted Sep 20, 1994·51 cites·16 claims
- 1860US5151867AMethod of minimizing sum-of-product cases in a heterogeneous data base environment for circuit synthesisDIGITAL EQUIPMENT CORP·Filed 1989·Granted Sep 29, 1992·20 cites·38 claims
- 1958US6226290B1Method and apparatus for adjusting an interpacket gap using a network device in a data communications networkNORTEL NETWORKS LTD·Filed 1998·Granted May 1, 2001·37 cites·18 claims
- 2037US6061737ATwo-pin distributed ethernet bus architectureCABLETRON SYSTEM INC·Filed 1999·Granted May 9, 2000·12 cites·1 claims
- 2132US5963719ATwo-pin distributed ethernet bus architectureCABLETRON SYSTEMS INC·Filed 1996·Granted Oct 5, 1999·7 cites·2 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →