Inventor · disambiguated record
James C. Sexton
Also filed as: SEXTON JAMES C
15 granted patents·3 pending applications·100 citations·filing 2003–2022
91Inventor score
Top patents by PatentIndex Score
18 records- 0188US11016908B2Distributed directory of named data elements in coordination namespaceIBM·Filed 2018·Granted May 25, 2021·5 cites·25 claims
- 0283US7469266B2Method and structure for producing high performance linear algebra routines using register block data format routinesIBM·Filed 2003·Granted Dec 23, 2008·31 cites·13 claims
- 0378US8117288B2Optimizing layout of an application on a massively parallel supercomputerBHANOT GYAN V·Filed 2004·Granted Feb 14, 2012·36 cites·20 claims
- 0476US11288194B2Global virtual address space consistency modelIBM·Filed 2018·Granted Mar 29, 2022·2 cites·25 claims
- 0571US8037215B2Performance evaluation of algorithmic tasks and dynamic parameterization on multi-core processing systemsIBM·Filed 2008·Granted Oct 11, 2011·4 cites·4 claims
- 0671US7844630B2Method and structure for fast in-place transformation of standard full and packed matrix data formatsIBM·Filed 2008·Granted Nov 30, 2010·5 cites·19 claims
- 0767US8316072B2Method and structure for producing high performance linear algebra routines using register block data format routinesGUSTAVSON FRED GEHRUNG·Filed 2008·Granted Nov 20, 2012·3 cites·20 claims
- 0866US7831803B2Executing multiple instructions multiple date (‘MIMD’) programs on a single instruction multiple data (‘SIMD’) machineIBM·Filed 2007·Granted Nov 9, 2010·5 cites·3 claims
- 0963US8566484B2Distributed trace using central performance counter memorySATTERFIELD DAVID L·Filed 2012·Granted Oct 22, 2013·2 cites·5 claims
- 1062US8356122B2Distributed trace using central performance counter memoryIBM·Filed 2010·Granted Jan 15, 2013·1 cites·13 claims
- 1160US9213680B2Method and structure for fast in-place transformation of standard full and packed matrix data formatsGUSTAVSON FRED GEHRUNG·Filed 2007·Granted Dec 15, 2015·2 cites·18 claims
- 1259US7831802B2Executing Multiple Instructions Multiple Data (‘MIMD’) programs on a Single Instruction Multiple Data (‘SIMD’) machineIBM·Filed 2007·Granted Nov 9, 2010·2 cites·6 claims
- 1359US7793011B2Performance evaluation of algorithmic tasks and dynamic parameterization on multi-core processing systemsIBM·Filed 2008·Granted Sep 7, 2010·1 cites·12 claims
- 1451US2009144745A1Performance Evaluation of Algorithmic Tasks and Dynamic Parameterization on Multi-Core Processing SystemsGUNNELS JOHN A·Filed 2007·Application pending·0 cites
- 1551US2009144744A1Performance Evaluation of Algorithmic Tasks and Dynamic Parameterization on Multi-Core Processing SystemsGUNNELS JOHN A·Filed 2007·Application pending·0 cites
- 1647US12177031B2Enhanced endpoint multicast emulationIBM·Filed 2022·Granted Dec 24, 2024·0 cites·20 claims
- 1747US9842001B2System level acceleration serverDRAHZAL MATTHEW R·Filed 2012·Granted Dec 12, 2017·1 cites·16 claims
- 1842US2006161612A1Method and structure for a generalized cache-register file interface with data restructuring methods for multiple cache levels and hardware pre-fetchingIBM·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →