Inventor · disambiguated record
Arnold Blum
Also filed as: BLUM ARNOLD
19 granted patents·683 citations·filing 1975–1993
96Inventor score
Top patents by PatentIndex Score
19 records- 0195US5078581ACascade compressorIBM·Filed 1990·Granted Jan 7, 1992·156 cites·3 claims
- 0290US4621363ATesting and diagnostic device for digital computersIBM·Filed 1984·Granted Nov 4, 1986·45 cites·9 claims
- 0383US4476431AShift register latch circuit means contained in LSI circuitry conforming to level sensitive scan design (LSSD) rules and techniques and utilized at least in part for check and test purposesIBM·Filed 1981·Granted Oct 9, 1984·35 cites·5 claims
- 0479US4109311AInstruction execution modification mechanism for time slice controlled data processorsIBM·Filed 1976·Granted Aug 22, 1978·50 cites·6 claims
- 0577US4669079AMethod and apparatus for bus arbitration in a data processing systemIBM·Filed 1985·Granted May 26, 1987·62 cites·9 claims
- 0675US5467452ARouting control information via a bus selectively controls whether data should be routed through a switch or a bus according to number of destination processorsIBM·Filed 1993·Granted Nov 14, 1995·74 cites·4 claims
- 0771US4419739ADecentralized generation of synchronized clock control signals having dynamically selectable periodsIBM·Filed 1982·Granted Dec 6, 1983·37 cites·6 claims
- 0871US4295220AClock check circuits using delayed signalsIBM·Filed 1979·Granted Oct 13, 1981·15 cites·15 claims
- 0971US3959638AHighly available computer systemIBM·Filed 1975·Granted May 25, 1976·34 cites·7 claims
- 1067US4688222ABuilt-in parallel testing circuit for use in a processorIBM·Filed 1985·Granted Aug 18, 1987·36 cites·13 claims
- 1167US4428060AShift register latch circuit means for check and test purposes and contained in LSI circuitry conforming to level sensitive scan design (LSSD) rules and techniquesIBM·Filed 1981·Granted Jan 24, 1984·20 cites·5 claims
- 1263US4802062AIntegrated wiring system for VLSIIBM·Filed 1987·Granted Jan 31, 1989·28 cites·40 claims
- 1357US4604746ATesting and diagnostic device for digital computersIBM·Filed 1984·Granted Aug 5, 1986·21 cites·8 claims
- 1454US5164818ARemovable vlsi assemblyIBM·Filed 1991·Granted Nov 17, 1992·20 cites·12 claims
- 1554US4490673ATesting an integrated circuit containing a tristate driver and a control signal generating network thereforIBM·Filed 1982·Granted Dec 25, 1984·12 cites·10 claims
- 1653US4231085AArrangement for micro instruction controlIBM·Filed 1978·Granted Oct 28, 1980·18 cites·5 claims
- 1735US5319948ALow temperature generation process and expansion engineBLUM ARNOLD·Filed 1992·Granted Jun 14, 1994·10 cites·18 claims
- 1833US4095270AMethod of implementing manual operationsIBM·Filed 1977·Granted Jun 13, 1978·6 cites·4 claims
- 1925US4030076AProcessor nucleus combined with nucleus time controlled external registers integrated with logic and arithmetic circuits shared between nucleus and I/O devicesIBM·Filed 1975·Granted Jun 14, 1977·4 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →