Inventor · disambiguated record
Joseph M. Harvilchuck
Also filed as: HARVILCHUCK JOSEPH M
10 granted patents·480 citations·filing 1975–1995
92Inventor score
Files withIBM8
Top patents by PatentIndex Score
10 records- 0194US5130067AMethod and means for co-sintering ceramic/metal mlc substratesIBM·Filed 1986·Granted Jul 14, 1992·140 cites·21 claims
- 0293US5052481AHigh conduction cooling module having internal fins and compliant interfaces for vlsi chip technologyIBM·Filed 1988·Granted Oct 1, 1991·131 cites·45 claims
- 0392US3994793AReactive ion etching of aluminumIBM·Filed 1975·Granted Nov 30, 1976·86 cites·9 claims
- 0468US5153408AMethod and structure for repairing electrical linesIBM·Filed 1990·Granted Oct 6, 1992·33 cites·44 claims
- 0558US4634638AHigh melting point copper-gold-tin brazing alloy for chip carriersIBM·Filed 1981·Granted Jan 6, 1987·19 cites·8 claims
- 0656US5543584AStructure for repairing electrical linesIBM·Filed 1992·Granted Aug 6, 1996·21 cites·24 claims
- 0750US4962294AMethod and apparatus for causing an open circuit in a conductive lineIBM·Filed 1989·Granted Oct 9, 1990·17 cites·36 claims
- 0843US5565235AProcess for selectively depositing a nickel-boron coating over a metallurgy pattern on a dielectric substrateFiled 1995·Granted Oct 15, 1996·12 cites·23 claims
- 0940US5403650AProcess for selectively depositing a nickel-boron coating over a metallurgy pattern on a dielectric substrate and products produced therebyFiled 1993·Granted Apr 4, 1995·12 cites·27 claims
- 1032US4601424AStripped gold plating processIBM·Filed 1985·Granted Jul 22, 1986·9 cites·8 claims
Join the waitlist — get patent alerts
Get an alert when Joseph M. Harvilchuck files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →