Inventor · disambiguated record
Nital Patwa
Also filed as: PATWA NITAL · PATWA NITAL P · PATWA NITAL PANKAJKUMAR
22 granted patents·1 pending application·657 citations·filing 1992–2021
96Inventor score
Top patents by PatentIndex Score
23 records- 0189US5418973ADigital computer system with cache controller coordinating both vector and scalar operationsDIGITAL EQUIPMENT CORP·Filed 1992·Granted May 23, 1995·163 cites·7 claims
- 0288US5471598AData dependency detection and handling in a microprocessor with write bufferCYRIX CORP·Filed 1993·Granted Nov 28, 1995·139 cites·6 claims
- 0386US8775687B1Method to ensure data coherency in a scalable aggregate neighbor-device interfaceLSI CORP·Filed 2013·Granted Jul 8, 2014·9 cites·20 claims
- 0483US5883423ADecoupling capacitor for integrated circuit signal driverNAT SEMICONDUCTOR CORP·Filed 1996·Granted Mar 16, 1999·81 cites·24 claims
- 0576US6775414B1Variable-length code decoderATI INT SRL·Filed 1999·Granted Aug 10, 2004·37 cites·41 claims
- 0671US8086055B2Variable-length code decoderFOGG CHAD E·Filed 2009·Granted Dec 27, 2011·2 cites·17 claims
- 0768US9684613B2Methods and systems for reducing spurious interrupts in a data storage systemSEAGATE TECHNOLOGY LLC·Filed 2014·Granted Jun 20, 2017·2 cites·22 claims
- 0868US6286023B1Partitioned adder tree supported by a multiplexer configurationATI INT SRL·Filed 1998·Granted Sep 4, 2001·52 cites·7 claims
- 0968US5740398AProgram order sequencing of data in a microprocessor with write bufferCYRIX CORP·Filed 1993·Granted Apr 14, 1998·49 cites·7 claims
- 1065US7574065B2Variable-length code decoderATI INT SRL·Filed 2004·Granted Aug 11, 2009·5 cites·44 claims
- 1162US6081823ACircuit and method for wrap-around sign extension for signed numbersATI INT SRL·Filed 1998·Granted Jun 27, 2000·40 cites·7 claims
- 1253US8824819B2Variable-length code decoderFOGG CHAD E·Filed 2011·Granted Sep 2, 2014·0 cites·14 claims
- 1351US12014052B2Cooperative storage architectureGOOGLE LLC·Filed 2021·Granted Jun 18, 2024·0 cites·14 claims
- 1446US2014331001A1Command Barrier for a Solid State Drive ControllerLSI CORP·Filed 2014·Application pending·0 cites
- 1542US6745318B1Method and apparatus of configurable processingFiled 1999·Granted Jun 1, 2004·18 cites·7 claims
- 1642US6415311B1Sign extension circuit and method for unsigned multiplication and accumulationATI INT SRL·Filed 1999·Granted Jul 2, 2002·14 cites·8 claims
- 1737US6127842AModified adder tree structure and method using logic and gates to generate carry-in valuesATI INT SRL·Filed 1999·Granted Oct 3, 2000·10 cites·9 claims
- 1837US5689454ACircuitry and methodology for pulse captureCYRIX CORP·Filed 1996·Granted Nov 18, 1997·5 cites·2 claims
- 1936US5796976ATemporary storage having entries smaller than memory busDIGITAL EQUIPMENT CORP·Filed 1996·Granted Aug 18, 1998·9 cites·30 claims
- 2035US6073156ACircuit and method for wrap-around sign extension for signed numbers using replacement of most significant bitATI INT SRL·Filed 1998·Granted Jun 6, 2000·7 cites·6 claims
- 2134US6249799B1Selective carry boundaryATI INT SRL·Filed 1998·Granted Jun 19, 2001·6 cites·8 claims
- 2232US6249147B1Method and apparatus for high speed on-chip signal propagationFUJITSU LTD·Filed 1999·Granted Jun 19, 2001·2 cites·59 claims
- 2330US6167422ABooth multiplication structure which selectively integrates the function of either of incrementing or negating with the function of booth multiplicationATI INTERNAT SRL BEAUMONT HOUS·Filed 1998·Granted Dec 26, 2000·7 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →