Inventor · disambiguated record
Khalid Rahmat
Also filed as: RAHMAT KHALID
13 granted patents·2 pending applications·467 citations·filing 1999–2013
93Inventor score
Technology areasG06F
Top patents by PatentIndex Score
15 records- 0198US7366997B1Methods and apparatuses for thermal analysis based circuit designSYNPLICITY INC·Filed 2005·Granted Apr 29, 2008·288 cites·33 claims
- 0292US7627844B2Methods and apparatuses for transient analyses of circuitsSYNOPSYS INC·Filed 2007·Granted Dec 1, 2009·26 cites·27 claims
- 0390US7941779B2Methods and apparatuses for thermal analysis based circuit designSYNOPSYS INC·Filed 2008·Granted May 10, 2011·17 cites·19 claims
- 0488US7278120B2Methods and apparatuses for transient analyses of circuitsSYNPLICITY INC·Filed 2004·Granted Oct 2, 2007·45 cites·51 claims
- 0582US8572535B2Thermal analysis based circuit designRAHMAT KHALID·Filed 2011·Granted Oct 29, 2013·5 cites·21 claims
- 0676US8813011B2Clock-reconvergence pessimism removal in hierarchical static timing analysisSYNOPSYS INC·Filed 2013·Granted Aug 19, 2014·4 cites·23 claims
- 0774US8321824B2Multiple-power-domain static timing analysisZEJDA JINDRICH·Filed 2009·Granted Nov 27, 2012·8 cites·24 claims
- 0872US8079004B2Efficient exhaustive path-based static timing analysis using a fast estimation techniqueSOVIANI CRISTIAN·Filed 2009·Granted Dec 13, 2011·12 cites·25 claims
- 0970US8065129B1Methods and apparatuses for circuit simulationRAHMAT KHALID·Filed 2004·Granted Nov 22, 2011·23 cites·27 claims
- 1068US8881088B2Thermal analysis based circuit designSYNOPSYS INC·Filed 2013·Granted Nov 4, 2014·1 cites·13 claims
- 1164US8434040B2Clock-reconvergence pessimism removal in hierarchical static timing analysisBHARDWAJ SARVESH·Filed 2011·Granted Apr 30, 2013·2 cites·10 claims
- 1257US8775855B2Reducing memory used to store totals in static timing analysisBHARDWAJ SARVESH·Filed 2011·Granted Jul 8, 2014·1 cites·20 claims
- 1357US6567773B1Use of static noise analysis for integrated circuits fabricated in a silicon-on-insulator process technologyIBM·Filed 1999·Granted May 20, 2003·35 cites·24 claims
- 1441US2012078605A1Methods and Apparatuses for Circuit SimulationRAHMAT KHALID·Filed 2011·Application pending·0 cites
- 1540US2003188267A1Circuit and method for modeling I/OIBM·Filed 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →