Inventor · disambiguated record
Yoshiki Okumura
Also filed as: OKUMURA YOSHIKI
11 granted patents·3 pending applications·181 citations·filing 1998–2017
89Inventor score
Top patents by PatentIndex Score
14 records- 0189US7096406B2Memory controller for multilevel cell memorySPANSION LLC·Filed 2002·Granted Aug 22, 2006·60 cites·19 claims
- 0284US6643730B2CPU controlled memory controlling device for accessing operational informationFUJITSU LTD·Filed 2001·Granted Nov 4, 2003·38 cites·8 claims
- 0368US6418501B1Memory cardFUJITSU LTD·Filed 1999·Granted Jul 9, 2002·54 cites·8 claims
- 0466US7480691B2Arithmetic device for multiple precision arithmetic for Montgomery multiplication residue arithmeticFUJITSU LTD·Filed 2004·Granted Jan 20, 2009·13 cites·22 claims
- 0548US6449681B1Memory unit and buffer access control circuit for updating an address when consecutively accessing upper and lower buffersFUJITSU LTD·Filed 2001·Granted Sep 10, 2002·5 cites·6 claims
- 0645US11586169B2Production management deviceYAMAHA MOTOR CO LTD·Filed 2017·Granted Feb 21, 2023·0 cites·3 claims
- 0742US2014294015A1Relay device and relay methodFUJITSU LTD·Filed 2014·Application pending·0 cites
- 0841US9542266B2Semiconductor integrated circuit and method of processing in semiconductor integrated circuitFUJITSU LTD·Filed 2014·Granted Jan 10, 2017·0 cites·15 claims
- 0939US2014192928A1Transmission system, sending device, receiving device, and transmission methodFUJITSU LTD·Filed 2014·Application pending·0 cites
- 1038US2014040684A1System for packet communication and communication methodFUJITSU LTD·Filed 2013·Application pending·0 cites
- 1135US6289411B1Circuit for generating a chip-enable signal for a multiple chip configurationFUJITSU LTD·Filed 1999·Granted Sep 11, 2001·7 cites·16 claims
- 1232US7159058B2State indicating information setting circuit and status bit setting circuitFUJITSU LTD·Filed 2004·Granted Jan 2, 2007·0 cites·10 claims
- 1331US6339809B1Memory unit and buffer access control circuit for updating an address when consecutively accessing upper and lower buffersFUJITSU LTD·Filed 1999·Granted Jan 15, 2002·2 cites·2 claims
- 1421US6035353AComputer including data signal monitoring circuitFUJITSU LTD·Filed 1998·Granted Mar 7, 2000·2 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →