Inventor · disambiguated record
Kevin C. Cleereman
Also filed as: CLEEREMAN KEVIN C · CLEEREMAN KEVIN CHRISTOPHER
7 granted patents·405 citations·filing 1996–1998
89Inventor score
Technology areasG06F
Top patents by PatentIndex Score
7 records- 0188US6421818B1Efficient top-down characterization methodLSI LOGIC CORP·Filed 1998·Granted Jul 16, 2002·152 cites·15 claims
- 0274US5980092AMethod and apparatus for optimizing a gated clock structure using a standard optimization toolUNISYS CORP·Filed 1996·Granted Nov 9, 1999·73 cites·26 claims
- 0364US5956256AMethod and apparatus for optimizing a circuit design having multi-paths thereinUNISYS CORP·Filed 1996·Granted Sep 21, 1999·47 cites·32 claims
- 0464US5864487AMethod and apparatus for identifying gated clocks within a circuit design using a standard optimization toolUNISYS CORP·Filed 1996·Granted Jan 26, 1999·49 cites·48 claims
- 0563US6026220AMethod and apparatus for incremntally optimizing a circuit designUNISYS CORP·Filed 1996·Granted Feb 15, 2000·50 cites·31 claims
- 0646US5940604AMethod and apparatus for monitoring the performance of a circuit optimization toolUNISYS CORP·Filed 1996·Granted Aug 17, 1999·20 cites·37 claims
- 0741US5960184AMethod and apparatus for providing optimization parameters to a logic optimizer toolUNISYS CORP·Filed 1996·Granted Sep 28, 1999·14 cites·28 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →