Inventor · disambiguated record
Sheryll H. Veneracion
Also filed as: VENERACION SHERYLL H
6 granted patents·47 citations·filing 2003–2007
81Inventor score
Files withIBM6
Top patents by PatentIndex Score
6 records- 0189US7698352B2System and method for converting from scaled binary coded decimal into decimal floating pointIBM·Filed 2005·Granted Apr 13, 2010·23 cites·20 claims
- 0276US7853635B2Modular binary multiplier for signed and unsigned operands of variable widthsIBM·Filed 2007·Granted Dec 14, 2010·6 cites·14 claims
- 0368US7266580B2Modular binary multiplier for signed and unsigned operands of variable widthsIBM·Filed 2003·Granted Sep 4, 2007·10 cites·21 claims
- 0468US7200742B2System and method for creating precise exceptionsIBM·Filed 2005·Granted Apr 3, 2007·4 cites·16 claims
- 0560US8364734B2Converting from decimal floating point into scaled binary coded decimalIBM·Filed 2005·Granted Jan 29, 2013·4 cites·14 claims
- 0652US7490121B2Modular binary multiplier for signed and unsigned operands of variable widthsIBM·Filed 2007·Granted Feb 10, 2009·0 cites·14 claims
Join the waitlist — get patent alerts
Get an alert when Sheryll H. Veneracion files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →