Inventor · disambiguated record
Deependra Kumar Jain
Also filed as: JAIN DEEPENDRA · JAIN DEEPENDRA K · JAIN DEEPENDRA KUMAR
22 granted patents·1 pending application·90 citations·filing 2005–2025
93Inventor score
Top patents by PatentIndex Score
23 records- 0193US11646743B1Digital phase-locked loopNXP USA INC·Filed 2022·Granted May 9, 2023·5 cites·20 claims
- 0292US8350631B1Relaxation oscillator with low power consumptionFREESCALE SEMICONDUCTOR INC·Filed 2011·Granted Jan 8, 2013·13 cites·17 claims
- 0392US7683668B1Level shifterFREESCALE SEMICONDUCTOR INC·Filed 2008·Granted Mar 23, 2010·29 cites·17 claims
- 0485US10263627B1Delay-locked loop having initialization circuitNXP USA INC·Filed 2017·Granted Apr 16, 2019·5 cites·16 claims
- 0582US12334938B2Digital frequency synthesizerNXP USA INC·Filed 2023·Granted Jun 17, 2025·1 cites·20 claims
- 0681US9252791B1Phase locked loop and method for generating an oscillator signalSINHA ANAND KUMAR·Filed 2014·Granted Feb 2, 2016·6 cites·20 claims
- 0772US8378725B2Adaptive bandwidth phase-locked loopFREESCALE SEMICONDUCTOR INC·Filed 2011·Granted Feb 19, 2013·4 cites·16 claims
- 0872US8248130B2Duty cycle correction circuitJAIN VINOD·Filed 2010·Granted Aug 21, 2012·6 cites·11 claims
- 0967US9331698B2Level shifter circuitJAIN DEEPENDRA K·Filed 2014·Granted May 3, 2016·4 cites·14 claims
- 1065US9419629B1Delay-locked loop circuit with fractional phase frequency detectorFREESCALE SEMICONDUCTOR INC·Filed 2016·Granted Aug 16, 2016·2 cites·11 claims
- 1164US9337818B1Buffer circuit for voltage controlled oscillatorFREESCALE SEMICONDUCTOR INC·Filed 2015·Granted May 10, 2016·2 cites·10 claims
- 1264US7907022B2Phase-locked loop and method for operating the sameFREESCALE SEMICONDUCTOR INC·Filed 2009·Granted Mar 15, 2011·5 cites·10 claims
- 1362US7304513B2Area efficient programmable frequency dividerST MICROELECTRONICS PVT LTD·Filed 2005·Granted Dec 4, 2007·4 cites·16 claims
- 1460US9362894B1Clock generator circuitOMER ATEET·Filed 2015·Granted Jun 7, 2016·2 cites·19 claims
- 1557US12191859B2System and method for controlling tuning in electronic circuitriesNXP BV·Filed 2023·Granted Jan 7, 2025·0 cites·20 claims
- 1655US12483265B2RDAC ladder with adaptive biasing to reduce the reference variation across temperatureNXP USA INC·Filed 2023·Granted Nov 25, 2025·0 cites·19 claims
- 1755US12081218B2Multiphase digital frequency synthesizer with fractional divisionNXP USA INC·Filed 2023·Granted Sep 3, 2024·0 cites·20 claims
- 1855US8093929B2Programmable digital clock signal frequency divider module and modular divider circuitJAIN ANKESH·Filed 2010·Granted Jan 10, 2012·2 cites·20 claims
- 1954US2025309903A1Phase-locked loop reference clock switching with controlled output transient frequency driftNXP BV·Filed 2025·Application pending·0 cites
- 2050US11601130B2Initialization circuit of delay locked loopNXP BV·Filed 2021·Granted Mar 7, 2023·0 cites·20 claims
- 2140US11581850B2System for enabling external oscillators in system-on-chipsNXP USA INC·Filed 2020·Granted Feb 14, 2023·0 cites·20 claims
- 2237US11784651B2Circuitry and methods for fractional division of high-frequency clock signalsNXP BV·Filed 2021·Granted Oct 10, 2023·0 cites·16 claims
- 2335US7642865B2System and method for multiple-phase clock generationST MICROELECTRONICS PVT LTD·Filed 2006·Granted Jan 5, 2010·0 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →