Inventor · disambiguated record
Kok Hin Teo
Also filed as: TEO KOK HIN
6 granted patents·167 citations·filing 1999–2018
84Inventor score
Top patents by PatentIndex Score
6 records- 0185US6281082B1Method to form MOS transistors with a common shallow trench isolation and interlevel dielectric gap fillCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Aug 28, 2001·52 cites·20 claims
- 0284US6204137B1Method to form transistors and local interconnects using a silicon nitride dummy gate techniqueCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Mar 20, 2001·44 cites·20 claims
- 0383US6306723B1Method to form shallow trench isolations without a chemical mechanical polishCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Oct 23, 2001·42 cites·20 claims
- 0466US6380066B1Methods for eliminating metal corrosion by FSGCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 30, 2002·12 cites·18 claims
- 0551US6103569AMethod for planarizing local interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Aug 15, 2000·17 cites·14 claims
- 0645US10580615B2System and method for performing failure analysis using virtual three-dimensional imagingGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 3, 2020·0 cites·20 claims
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