Assignee
RAHMAN ARIFUR
US·21 granted patents·284 citations·filing 2007–2011
Top patents by PatentIndex Score
21 records- 0197US8237274B1Integrated circuit package with redundant micro-bumpsRAHMAN ARIFUR·Filed 2010·Granted Aug 7, 2012·48 cites·20 claims
- 0296US8063654B2Apparatus and method for testing of stacked die structureRAHMAN ARIFUR·Filed 2009·Granted Nov 22, 2011·56 cites·20 claims
- 0394US9330823B1Integrated circuit structure with inductor in silicon interposerRAHMAN ARIFUR·Filed 2011·Granted May 3, 2016·14 cites·17 claims
- 0494US8415783B1Apparatus and methodology for testing stacked dieRAHMAN ARIFUR·Filed 2007·Granted Apr 9, 2013·33 cites·18 claims
- 0592US8648615B2Testing die-to-die bonding and reworkRAHMAN ARIFUR·Filed 2010·Granted Feb 11, 2014·11 cites·16 claims
- 0690US8933345B1Method and apparatus for monitoring through-silicon viasRAHMAN ARIFUR·Filed 2010·Granted Jan 13, 2015·11 cites·21 claims
- 0790US8089299B1Integrated circuit with through-die via interface for die stacking and cross-track routingRAHMAN ARIFUR·Filed 2009·Granted Jan 3, 2012·18 cites·20 claims
- 0888US8933447B1Method and apparatus for programmable device testing in stacked die applicationsRAHMAN ARIFUR·Filed 2010·Granted Jan 13, 2015·10 cites·15 claims
- 0988US8332803B1Method and apparatus for integrated circuit package thermo-mechanical reliability analysisRAHMAN ARIFUR·Filed 2010·Granted Dec 11, 2012·12 cites·20 claims
- 1087US8156456B1Unified design methodology for multi-die integrated circuitsRAHMAN ARIFUR·Filed 2010·Granted Apr 10, 2012·15 cites·20 claims
- 1185US8802454B1Methods of manufacturing a semiconductor structureRAHMAN ARIFUR·Filed 2011·Granted Aug 12, 2014·7 cites·20 claims
- 1284US8779553B2Stress-aware design for integrated circuits comprising a stress inducing structure and keep out zoneRAHMAN ARIFUR·Filed 2011·Granted Jul 15, 2014·7 cites·18 claims
- 1383US8082537B1Method and apparatus for implementing spatially programmable through die vias in an integrated circuitRAHMAN ARIFUR·Filed 2009·Granted Dec 20, 2011·11 cites·20 claims
- 1482US8560982B2Integrated circuit design using through silicon viasRAHMAN ARIFUR·Filed 2011·Granted Oct 15, 2013·6 cites·8 claims
- 1580US8216936B1Low capacitance electrical connection viaRAHMAN ARIFUR·Filed 2010·Granted Jul 10, 2012·5 cites·9 claims
- 1679US8886481B1Reducing variation in multi-die integrated circuitsRAHMAN ARIFUR·Filed 2010·Granted Nov 11, 2014·4 cites·19 claims
- 1777US8987868B1Method and apparatus for programmable heterogeneous integration of stacked semiconductor dieRAHMAN ARIFUR·Filed 2009·Granted Mar 24, 2015·7 cites·12 claims
- 1872US8299590B2Semiconductor assembly having reduced thermal spreading resistance and methods of making sameRAHMAN ARIFUR·Filed 2008·Granted Oct 30, 2012·5 cites·20 claims
- 1970US8296689B1Customizing metal pattern density in die-stacking applicationsRAHMAN ARIFUR·Filed 2009·Granted Oct 23, 2012·4 cites·20 claims
- 2044US9698123B2Apparatus for stacked electronic circuitry and associated methodsRAHMAN ARIFUR·Filed 2011·Granted Jul 4, 2017·0 cites·14 claims
- 2140US8546191B2Disposing underfill in an integrated circuit structureRAHMAN ARIFUR·Filed 2010·Granted Oct 1, 2013·0 cites·12 claims
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