Assignee
NAGARAJAN PRADEEP
US·4 granted patents·28 citations·filing 2008–2012
Top patents by PatentIndex Score
4 records- 0186US8237475B1Techniques for generating PVT compensated phase offset to improve accuracy of a locked loopNAGARAJAN PRADEEP·Filed 2008·Granted Aug 7, 2012·16 cites·25 claims
- 0273US8680905B1Digital PVT compensation for delay chainNAGARAJAN PRADEEP·Filed 2012·Granted Mar 25, 2014·4 cites·20 claims
- 0373US8130016B2Techniques for providing reduced duty cycle distortionNAGARAJAN PRADEEP·Filed 2009·Granted Mar 6, 2012·8 cites·20 claims
- 0444US8159277B1Techniques for providing multiple delay paths in a delay circuitNAGARAJAN PRADEEP·Filed 2011·Granted Apr 17, 2012·0 cites·20 claims
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