Individual holder
MOYER WILLIAM C
US·77 granted patents·10 pending applications·305 citations·filing 2003–2015
Individually held — no corporate assignee on record.
Top patents by PatentIndex Score
87 records- 0191US8190860B2Result forwarding to dependent instruction in pipelined processor with mode selectable execution in E1 or E2 of pipelined operational stagesMOYER WILLIAM C·Filed 2010·Granted May 29, 2012·11 cites·7 claims
- 0290US8261047B2Qualification of conditional debug instructions based on addressMOYER WILLIAM C·Filed 2008·Granted Sep 4, 2012·22 cites·20 claims
- 0389US8607121B2Selective error detection and error correction for a memory interfaceMOYER WILLIAM C·Filed 2011·Granted Dec 10, 2013·11 cites·19 claims
- 0489US8191085B2Method and apparatus for loading or storing multiple registers in a data processing systemMOYER WILLIAM C·Filed 2006·Granted May 29, 2012·22 cites·14 claims
- 0586US9053233B2Method and device for controlling debug event resourcesMOYER WILLIAM C·Filed 2011·Granted Jun 9, 2015·9 cites·20 claims
- 0686US8266498B2Implementation of multiple error detection schemes for a cacheMOYER WILLIAM C·Filed 2009·Granted Sep 11, 2012·14 cites·20 claims
- 0784US8566672B2Selective checkbit modification for error correctionMOYER WILLIAM C·Filed 2011·Granted Oct 22, 2013·8 cites·20 claims
- 0884US8145985B2Error detection schemes for a unified cache in a data processing systemMOYER WILLIAM C·Filed 2008·Granted Mar 27, 2012·12 cites·20 claims
- 0981US8918591B2Data processing system having selective invalidation of snoop requests and method thereforMOYER WILLIAM C·Filed 2010·Granted Dec 23, 2014·6 cites·20 claims
- 1080US9223678B2Data processor device having a debug control module which selectively modifies trace messagesMOYER WILLIAM C·Filed 2013·Granted Dec 29, 2015·5 cites·20 claims
- 1180US8688910B2Debug control for snoop operations in a multiprocessor system and method thereofMOYER WILLIAM C·Filed 2009·Granted Apr 1, 2014·9 cites·18 claims
- 1280US8572345B2Memory management unit (MMU) having region descriptor globalization controls and method of operationMOYER WILLIAM C·Filed 2011·Granted Oct 29, 2013·5 cites·19 claims
- 1379US8589738B2Program trace message generation for page crossing events for debugMOYER WILLIAM C·Filed 2011·Granted Nov 19, 2013·5 cites·20 claims
- 1478US8990660B2Data processing system having end-to-end error correction and method thereforMOYER WILLIAM C·Filed 2010·Granted Mar 24, 2015·4 cites·11 claims
- 1578US8095831B2Programmable error actions for a cache in a data processing systemMOYER WILLIAM C·Filed 2008·Granted Jan 10, 2012·8 cites·17 claims
- 1677US8291305B2Error detection schemes for a cache in a data processing systemMOYER WILLIAM C·Filed 2008·Granted Oct 16, 2012·11 cites·20 claims
- 1777US8255748B2Soft error and transient error detection device and methods thereforMOYER WILLIAM C·Filed 2009·Granted Aug 28, 2012·8 cites·10 claims
- 1877US8090984B2Error detection and communication of an error location in multi-processor data processing system having processors operating in LockstepMOYER WILLIAM C·Filed 2008·Granted Jan 3, 2012·12 cites·18 claims
- 1976US8949551B2Memory protection unit (MPU) having a shared portion and method of operationMOYER WILLIAM C·Filed 2011·Granted Feb 3, 2015·4 cites·20 claims
- 2076US8725975B2Progressive memory initialization with waitpointsMOYER WILLIAM C·Filed 2007·Granted May 13, 2014·7 cites·20 claims
- 2175US9459977B2Data processing system with debug controlMOYER WILLIAM C·Filed 2014·Granted Oct 4, 2016·3 cites·20 claims
- 2274US8327082B2Snoop request arbitration in a data processing systemMOYER WILLIAM C·Filed 2008·Granted Dec 4, 2012·6 cites·16 claims
- 2374US8200908B2Method for debugger initiated coherency transactions using a shared coherency managerMOYER WILLIAM C·Filed 2009·Granted Jun 12, 2012·6 cites·18 claims
- 2474US8131948B2Snoop request arbitration in a data processing systemMOYER WILLIAM C·Filed 2008·Granted Mar 6, 2012·6 cites·17 claims
- 2574US8060724B2Provision of extended addressing modes in a single instruction multiple data (SIMD) data processorMOYER WILLIAM C·Filed 2008·Granted Nov 15, 2011·6 cites·21 claims
- 2673US8904109B2Selective cache access control apparatus and method thereofMOYER WILLIAM C·Filed 2011·Granted Dec 2, 2014·3 cites·20 claims
- 2773US8856587B2Control of interrupt generation for cacheMOYER WILLIAM C·Filed 2011·Granted Oct 7, 2014·3 cites·20 claims
- 2873US8504777B2Data processor for processing decorated instructions with cache bypassMOYER WILLIAM C·Filed 2010·Granted Aug 6, 2013·3 cites·20 claims
- 2971US8990657B2Selective masking for error correctionMOYER WILLIAM C·Filed 2011·Granted Mar 24, 2015·4 cites·20 claims
- 3071US8275977B2Debug signaling in a multiple processor data processing systemMOYER WILLIAM C·Filed 2009·Granted Sep 25, 2012·5 cites·20 claims
- 3170US8918707B2Codeword error injection via checkbit modificationMOYER WILLIAM C·Filed 2012·Granted Dec 23, 2014·2 cites·20 claims
- 3270US8762652B2Cache coherency protocol in a data processing systemMOYER WILLIAM C·Filed 2008·Granted Jun 24, 2014·4 cites·17 claims
- 3370US8131951B2Utilization of a store buffer for error recovery on a store allocation cache missMOYER WILLIAM C·Filed 2008·Granted Mar 6, 2012·5 cites·9 claims
- 3469US9158725B2Flexible control mechanism for store gathering in a write bufferMOYER WILLIAM C·Filed 2012·Granted Oct 13, 2015·2 cites·20 claims
- 3569US8775863B2Cache locking controlMOYER WILLIAM C·Filed 2011·Granted Jul 8, 2014·2 cites·20 claims
- 3669US8756405B2Selective routing of local memory accesses and device thereofMOYER WILLIAM C·Filed 2011·Granted Jun 17, 2014·2 cites·20 claims
- 3769US8423721B2Cache coherency protocol in a data processing systemMOYER WILLIAM C·Filed 2008·Granted Apr 16, 2013·4 cites·11 claims
- 3869US8180969B2Cache using pseudo least recently used (PLRU) cache replacement with lockingMOYER WILLIAM C·Filed 2008·Granted May 15, 2012·4 cites·18 claims
- 3968US8533400B2Selective memory access to different local memory ports and method thereofMOYER WILLIAM C·Filed 2011·Granted Sep 10, 2013·2 cites·20 claims
- 4068US8060730B2Selective MISR data accumulation during exception processingMOYER WILLIAM C·Filed 2008·Granted Nov 15, 2011·4 cites·20 claims
- 4166US8407457B2System and method for monitoring debug eventsMOYER WILLIAM C·Filed 2007·Granted Mar 26, 2013·3 cites·18 claims
- 4264US9092622B2Random timeslot controller for enabling built-in self test moduleMOYER WILLIAM C·Filed 2012·Granted Jul 28, 2015·1 cites·17 claims
- 4364US8984344B2Stack-based trace message generation for debug and device thereofMOYER WILLIAM C·Filed 2012·Granted Mar 17, 2015·1 cites·20 claims
- 4464US8700884B2Single-instruction multiple-data vector permutation instruction and method for performing table lookups for in-range index values and determining constant values for out-of-range index valuesMOYER WILLIAM C·Filed 2007·Granted Apr 15, 2014·3 cites·20 claims
- 4564US8402258B2Debug message generation using a selected address typeMOYER WILLIAM C·Filed 2008·Granted Mar 19, 2013·2 cites·18 claims
- 4664US8205068B2Branch target buffer allocationMOYER WILLIAM C·Filed 2008·Granted Jun 19, 2012·2 cites·19 claims
- 4763US9208036B2Dynamic lockstep cache memory replacement logicMOYER WILLIAM C·Filed 2011·Granted Dec 8, 2015·1 cites·21 claims
- 4863US9009411B2Flexible control mechanism for store gathering in a write bufferMOYER WILLIAM C·Filed 2012·Granted Apr 14, 2015·1 cites·19 claims
- 4963US8627471B2Permissions checking for data processing instructionsMOYER WILLIAM C·Filed 2008·Granted Jan 7, 2014·2 cites·21 claims
- 5062US9213665B2Data processor for processing a decorated storage notifyMOYER WILLIAM C·Filed 2008·Granted Dec 15, 2015·2 cites·22 claims
Showing the top 50 of 87 patent records by PatentIndex Score.
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