Assignee
LEHR MATTHIAS
DE·11 granted patents·6 pending applications·166 citations·filing 2006–2013
Top patents by PatentIndex Score
17 records- 0196US8924565B2Transport of customer flexibility changes in a multi-tenant environmentLEHR MATTHIAS·Filed 2013·Granted Dec 30, 2014·60 cites·20 claims
- 0296US8392573B2Transport of customer flexibility changes in a multi-tenant environmentLEHR MATTHIAS·Filed 2010·Granted Mar 5, 2013·72 cites·20 claims
- 0386US8329577B2Method of forming an alloy in an interconnect structure to increase electromigration resistanceLEHR MATTHIAS·Filed 2011·Granted Dec 11, 2012·8 cites·9 claims
- 0485US8863005B2Propagating business object extension fields from source to targetLEHR MATTHIAS·Filed 2009·Granted Oct 14, 2014·16 cites·16 claims
- 0579US9054112B2Semiconductor device comprising a die seal having an integrated alignment markLEHR MATTHIAS·Filed 2012·Granted Jun 9, 2015·5 cites·17 claims
- 0666US8114688B2Method and semiconductor structure for monitoring etch characteristics during fabrication of vias of interconnect structuresLEHR MATTHIAS·Filed 2010·Granted Feb 14, 2012·1 cites·17 claims
- 0764US8283247B2Semiconductor device including a die region designed for aluminum-free solder bump connection and a test structure designed for aluminum-free wire bondingLEHR MATTHIAS·Filed 2008·Granted Oct 9, 2012·4 cites·18 claims
- 0851US8216880B2Wire bonding on reactive metal surfaces of a metallization of a semiconductor device by providing a protection layerLEHR MATTHIAS·Filed 2011·Granted Jul 10, 2012·0 cites·14 claims
- 0950US8561446B2Method and device for fabricating bonding wires on the basis of microelectronic manufacturing techniquesLEHR MATTHIAS·Filed 2009·Granted Oct 22, 2013·0 cites·24 claims
- 1049US2009197408A1Increasing electromigration resistance in an interconnect structure of a semiconductor device by forming an alloyLEHR MATTHIAS·Filed 2008·Application pending·0 cites
- 1146US9450042B2Integrated circuits with metal-insulator-metal (MIM) capacitors and methods for fabricating sameLEHR MATTHIAS·Filed 2012·Granted Sep 20, 2016·0 cites·20 claims
- 1246US2008241756A1Enhancing lithography for vias and contacts by using double exposure based on line-like featuresLEHR MATTHIAS·Filed 2007·Application pending·0 cites
- 1346US2009166861A1Wire bonding of aluminum-free metallization layers by surface conditioningLEHR MATTHIAS·Filed 2008·Application pending·0 cites
- 1442US2007120264A1A semiconductor having a copper-based metallization stack with a last aluminum metal line layerLEHR MATTHIAS·Filed 2006·Application pending·0 cites
- 1541US8828888B2Protection of reactive metal surfaces of semiconductor devices during shipping by providing an additional protection layerLEHR MATTHIAS·Filed 2012·Granted Sep 9, 2014·0 cites·6 claims
- 1641US2007077761A1Technique for forming a copper-based metallization layer including a conductive capping layerLEHR MATTHIAS·Filed 2006·Application pending·0 cites
- 1741US2008099913A1Metallization layer stack without a terminal aluminum metal layerLEHR MATTHIAS·Filed 2007·Application pending·0 cites
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