Assignee
KELLER S B
0 granted patents·5 pending applications·0 citations·filing 2004–2004
Technology mixG06F5
Top patents by PatentIndex Score
5 records- 0143US2005210430A1System and method to optimize logical configuration relationships in VLSI circuit analysis toolsKELLER S B·Filed 2004·Application pending·0 cites
- 0243US2005210427A1System and method for facilitating efficient application of logical configuration information in VLSI circuit analysis toolsKELLER S B·Filed 2004·Application pending·0 cites
- 0343US2005210426A1System and method to prioritize and selectively apply configuration information for VLSI circuit analysis toolsKELLER S B·Filed 2004·Application pending·0 cites
- 0443US2005210429A1System and method to limit runtime of VLSI circuit analysis tools for complex electronic circuitsKELLER S B·Filed 2004·Application pending·0 cites
- 0543US2005210428A1System and method for flattening hierarchical designs in VLSI circuit analysis toolsKELLER S B·Filed 2004·Application pending·0 cites
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