Assignee
HUTTON MICHAEL D
US·10 granted patents·85 citations·filing 2009–2012
Top patents by PatentIndex Score
10 records- 0197US8314636B2Field programmable gate array with integrated application specific integrated circuit fabricHUTTON MICHAEL D·Filed 2010·Granted Nov 20, 2012·28 cites·21 claims
- 0295US8542032B1Integrated circuits with interconnect selection circuitryHUTTON MICHAEL D·Filed 2012·Granted Sep 24, 2013·13 cites·21 claims
- 0395US8072238B1Programmable logic device architecture with the ability to combine adjacent logic elements for the purpose of performing high order logic functionsHUTTON MICHAEL D·Filed 2010·Granted Dec 6, 2011·17 cites·23 claims
- 0481US8185854B1Method and apparatus for performing parallel slack computation within a shared netlist regionHUTTON MICHAEL D·Filed 2009·Granted May 22, 2012·11 cites·32 claims
- 0581US8112728B1Early timing estimation of timing statistical properties of placementHUTTON MICHAEL D·Filed 2009·Granted Feb 7, 2012·9 cites·19 claims
- 0676US8519740B2Integrated circuits with shared interconnect busesHUTTON MICHAEL D·Filed 2012·Granted Aug 27, 2013·4 cites·19 claims
- 0769US8601424B1Programmable logic device having logic elements with dedicated hardware to configure look up tables as registersHUTTON MICHAEL D·Filed 2010·Granted Dec 3, 2013·2 cites·20 claims
- 0865US8640067B1Method and apparatus for implementing a field programmable gate array clock skewHUTTON MICHAEL D·Filed 2010·Granted Jan 28, 2014·1 cites·25 claims
- 0949US9705506B2Field programmable gate array with integrated application specific integrated circuit fabricHUTTON MICHAEL D·Filed 2012·Granted Jul 11, 2017·0 cites·18 claims
- 1049US8860458B2Integrated circuits with logic regions having input and output bypass paths for accessing registersHUTTON MICHAEL D·Filed 2012·Granted Oct 14, 2014·0 cites·20 claims
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