Assignee
HINER DAVID JON
US·7 granted patents·105 citations·filing 2005–2012
Top patents by PatentIndex Score
7 records- 0196US8110909B1Semiconductor package including top-surface terminals for mounting another semiconductor packageHINER DAVID JON·Filed 2010·Granted Feb 7, 2012·20 cites·16 claims
- 0295US8987050B1Method and system for backside dielectric patterning for wafer warpage and stress controlHINER DAVID JON·Filed 2012·Granted Mar 24, 2015·16 cites·26 claims
- 0395US8390130B1Through via recessed reveal structure and methodHINER DAVID JON·Filed 2011·Granted Mar 5, 2013·19 cites·17 claims
- 0494US8440554B1Through via connected backside embedded circuit features structure and methodHINER DAVID JON·Filed 2010·Granted May 14, 2013·17 cites·19 claims
- 0586US8826531B1Method for making an integrated circuit substrate having laminated laser-embedded circuit layersHINER DAVID JON·Filed 2005·Granted Sep 9, 2014·15 cites·14 claims
- 0685US9230883B1Trace stacking structure and methodHINER DAVID JON·Filed 2010·Granted Jan 5, 2016·10 cites·26 claims
- 0785US8872329B1Extended landing pad substrate package structure and methodHINER DAVID JON·Filed 2009·Granted Oct 28, 2014·8 cites·14 claims
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