Assignee
FEUSTEL FRANK
DE·7 granted patents·8 pending applications·18 citations·filing 2006–2012
Top patents by PatentIndex Score
15 records- 0172US8835303B2Metallization system of a semiconductor device comprising extra-tapered transition viasFEUSTEL FRANK·Filed 2009·Granted Sep 16, 2014·5 cites·25 claims
- 0271US9245860B2Metallization system of a semiconductor device including metal pillars having a reduced diameter at the bottomFEUSTEL FRANK·Filed 2010·Granted Jan 26, 2016·3 cites·25 claims
- 0371US8173538B2Method of selectively forming a conductive barrier layer by ALDFEUSTEL FRANK·Filed 2007·Granted May 8, 2012·6 cites·11 claims
- 0464US8323989B2Test system and method of reducing damage in seed layers in metallization systems of semiconductor devicesFEUSTEL FRANK·Filed 2010·Granted Dec 4, 2012·2 cites·15 claims
- 0561US8198147B2Superior fill conditions in a replacement gate approach by using a tensile stressed overlayerFEUSTEL FRANK·Filed 2010·Granted Jun 12, 2012·1 cites·19 claims
- 0654US8174010B2Unified test structure for stress migration testsFEUSTEL FRANK·Filed 2007·Granted May 8, 2012·1 cites·19 claims
- 0748US8673087B2Reducing copper defects during a wet chemical cleaning of exposed copper surfaces in a metallization layer of a semiconductor deviceFEUSTEL FRANK·Filed 2008·Granted Mar 18, 2014·0 cites·16 claims
- 0848US2009298279A1Method for reducing metal irregularities in advanced metallization systems of semiconductor devicesFEUSTEL FRANK·Filed 2009·Application pending·0 cites
- 0947US2009294898A1Microstructure device including a metallization structure with self-aligned air gaps between closely spaced metal linesFEUSTEL FRANK·Filed 2009·Application pending·0 cites
- 1046US2012223388A1Superior fill conditions in a replacement gate approach by using a tensile stressed overlayerFEUSTEL FRANK·Filed 2012·Application pending·0 cites
- 1144US2009032961A1Semiconductor device having a locally enhanced electromigration resistance in an interconnect structureFEUSTEL FRANK·Filed 2008·Application pending·0 cites
- 1244US2008160762A1Method for the protection of metal layers against external contaminationFEUSTEL FRANK·Filed 2007·Application pending·0 cites
- 1343US2007278484A1Method and test structure for estimating electromigration effects caused by porous barrier materialsFEUSTEL FRANK·Filed 2007·Application pending·0 cites
- 1440US2006267207A1Method of forming electrically conductive lines in an integrated circuitFEUSTEL FRANK·Filed 2006·Application pending·0 cites
- 1536US2010289125A1Enhanced electromigration performance of copper lines in metallization systems of semiconductor devices by surface alloyingFEUSTEL FRANK·Filed 2010·Application pending·0 cites
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Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →