Assignee
ENDA TAKAYUKI
JP·3 granted patents·3 citations·filing 2006–2012
Top patents by PatentIndex Score
3 records- 0175US9570396B2Method of forming a damascene interconnect on a barrier layerENDA TAKAYUKI·Filed 2011·Granted Feb 14, 2017·3 cites·10 claims
- 0244US8222147B2Semiconductor device with stop layers and fabrication method using ceria slurryENDA TAKAYUKI·Filed 2006·Granted Jul 17, 2012·0 cites·15 claims
- 0342US9396959B2Semiconductor device with stop layers and fabrication method using ceria slurryENDA TAKAYUKI·Filed 2012·Granted Jul 19, 2016·0 cites·14 claims
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