Assignee
CHEN HSIEN-WEI
TW·39 granted patents·301 citations·filing 2007–2012
Top patents by PatentIndex Score
39 records- 0198US8754508B2Structure to increase resistance to electromigrationCHEN HSIEN-WEI·Filed 2012·Granted Jun 17, 2014·49 cites·21 claims
- 0295US8912668B2Electrical connections for chip scale packagingCHEN HSIEN-WEI·Filed 2012·Granted Dec 16, 2014·16 cites·20 claims
- 0394US8786081B2Method and device for circuit routing by way of under-bump metallizationCHEN HSIEN-WEI·Filed 2011·Granted Jul 22, 2014·17 cites·20 claims
- 0493US8723325B2Structure and method of forming a pad structure having enhanced reliabilityCHEN HSIEN-WEI·Filed 2010·Granted May 13, 2014·15 cites·28 claims
- 0593US8395239B2Grounded seal ring structure in semiconductor devicesCHEN HSIEN-WEI·Filed 2010·Granted Mar 12, 2013·16 cites·19 claims
- 0693US8253217B2Seal ring structure in semiconductor devicesCHEN HSIEN-WEI·Filed 2010·Granted Aug 28, 2012·16 cites·20 claims
- 0791US8987884B2Package assembly and methods for forming the sameCHEN HSIEN-WEI·Filed 2012·Granted Mar 24, 2015·10 cites·12 claims
- 0891US8581389B2Uniformity control for IC passivation structureCHEN HSIEN-WEI·Filed 2011·Granted Nov 12, 2013·12 cites·20 claims
- 0988US9305856B2Post-passivation interconnect structure AMD method of forming sameCHEN HSIEN-WEI·Filed 2012·Granted Apr 5, 2016·6 cites·20 claims
- 1088US8434041B2Increasing dielectric strength by optimizing dummy metal distributionCHEN HSIEN-WEI·Filed 2011·Granted Apr 30, 2013·10 cites·20 claims
- 1187US8710630B2Mechanisms for marking the orientation of a sawed dieCHEN HSIEN-WEI·Filed 2011·Granted Apr 29, 2014·8 cites·21 claims
- 1286US9627290B2Bump structure design for stress reductionCHEN HSIEN-WEI·Filed 2011·Granted Apr 18, 2017·7 cites·20 claims
- 1386US9613914B2Post-passivation interconnect structureCHEN HSIEN-WEI·Filed 2011·Granted Apr 4, 2017·6 cites·20 claims
- 1486US9240387B2Wafer-level chip scale package with re-workable underfillCHEN HSIEN-WEI·Filed 2011·Granted Jan 19, 2016·8 cites·17 claims
- 1586US8624391B2Chip design with robust corner bumpsCHEN HSIEN-WEI·Filed 2010·Granted Jan 7, 2014·8 cites·17 claims
- 1686US8581423B2Double solid metal pad with reduced areaCHEN HSIEN-WEI·Filed 2008·Granted Nov 12, 2013·11 cites·19 claims
- 1786US8237160B2Probe pad on a corner stress relief region in a semiconductor chipCHEN HSIEN-WEI·Filed 2011·Granted Aug 7, 2012·8 cites·20 claims
- 1884US8748305B2Pad structure for semiconductor devicesCHEN HSIEN-WEI·Filed 2009·Granted Jun 10, 2014·11 cites·20 claims
- 1984US8436472B2Corner stress release structure design for increasing circuit routing areasCHEN HSIEN-WEI·Filed 2010·Granted May 7, 2013·7 cites·17 claims
- 2082US8749027B2Robust TSV structureCHEN HSIEN-WEI·Filed 2009·Granted Jun 10, 2014·10 cites·23 claims
- 2180US8278737B2Structure for improving die saw qualityCHEN HSIEN-WEI·Filed 2009·Granted Oct 2, 2012·9 cites·10 claims
- 2279US8581250B2Method and apparatus of fabricating a pad structure for a semiconductor deviceCHEN HSIEN-WEI·Filed 2010·Granted Nov 12, 2013·5 cites·20 claims
- 2377US8629532B2Semiconductor wafer with assisting dicing structure and dicing method thereofCHEN HSIEN-WEI·Filed 2007·Granted Jan 14, 2014·6 cites·8 claims
- 2476US9076798B2Dicing structures for semiconductor substrates and methods of fabrication thereofCHEN HSIEN-WEI·Filed 2010·Granted Jul 7, 2015·3 cites·20 claims
- 2576US8779556B2Structure designs and methods for integrated circuit alignmentCHEN HSIEN-WEI·Filed 2011·Granted Jul 15, 2014·3 cites·17 claims
- 2674US9099318B2Semiconductor chip having different pad width to UBM width ratios and method of manufacturing the sameCHEN HSIEN-WEI·Filed 2011·Granted Aug 4, 2015·3 cites·20 claims
- 2774US8450126B2Semiconductor test pad structuresCHEN HSIEN-WEI·Filed 2011·Granted May 28, 2013·3 cites·20 claims
- 2874US8212330B2Process for improving the reliability of interconnect structures and resulting structureCHEN HSIEN-WEI·Filed 2010·Granted Jul 3, 2012·3 cites·18 claims
- 2972US9385076B2Semiconductor device with bump structure on an interconncet structureCHEN HSIEN-WEI·Filed 2011·Granted Jul 5, 2016·3 cites·20 claims
- 3072US8860208B2Heat spreader structures in scribe linesCHEN HSIEN-WEI·Filed 2011·Granted Oct 14, 2014·2 cites·19 claims
- 3171US8952530B2Post passivation interconnect structures and methods for forming the sameCHEN HSIEN-WEI·Filed 2012·Granted Feb 10, 2015·2 cites·20 claims
- 3266US8749020B2Metal e-fuse structure designCHEN HSIEN-WEI·Filed 2007·Granted Jun 10, 2014·3 cites·24 claims
- 3366US8426855B2Pad structure having a metalized region and a non-metalized regionCHEN HSIEN-WEI·Filed 2010·Granted Apr 23, 2013·1 cites·21 claims
- 3465US8648444B2Wafer scribe line structure for improving IC reliabilityCHEN HSIEN-WEI·Filed 2008·Granted Feb 11, 2014·3 cites·12 claims
- 3565US8125233B2Parametric testline with increased test pattern areasCHEN HSIEN-WEI·Filed 2010·Granted Feb 28, 2012·1 cites·20 claims
- 3654US8907469B2Integrated circuit package assembly and method of forming the sameCHEN HSIEN-WEI·Filed 2012·Granted Dec 9, 2014·0 cites·20 claims
- 3752US9806042B2Strain reduced structure for IC packagingCHEN HSIEN-WEI·Filed 2012·Granted Oct 31, 2017·0 cites·23 claims
- 3852US9478505B2Guard ring design structure for semiconductor devicesCHEN HSIEN-WEI·Filed 2012·Granted Oct 25, 2016·0 cites·15 claims
- 3948US9236322B2Methods and apparatus for heat spreader on siliconCHEN HSIEN-WEI·Filed 2012·Granted Jan 12, 2016·0 cites·20 claims
Join the waitlist — get patent alerts
Get an alert when CHEN HSIEN-WEI files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →