Assignee
CHAN YUEN HUNG
US·2 granted patents·1 pending application·3 citations·filing 2008–2010
Technology mixG11C3
Top patents by PatentIndex Score
3 records- 0149US8325543B2Global bit select circuit interface with false write through blockingCHAN YUEN HUNG·Filed 2010·Granted Dec 4, 2012·2 cites·20 claims
- 0243US8325549B2Global bit select circuit interface with simplified write bit line prechargingCHAN YUEN HUNG·Filed 2010·Granted Dec 4, 2012·1 cites·12 claims
- 0333US2008298137A1Method and structure for domino read bit line and set reset latchCHAN YUEN HUNG·Filed 2008·Application pending·0 cites
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Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →