Assignee
BHATTACHARYYA ARUP
US·20 granted patents·4 pending applications·239 citations·filing 2003–2012
Top patents by PatentIndex Score
24 records- 0197US8143657B2Discrete trap non-volatile multi-functional memory deviceBHATTACHARYYA ARUP·Filed 2010·Granted Mar 27, 2012·26 cites·17 claims
- 0297US8063436B2Memory cells configured to allow for erasure by enhanced F-N tunneling of holes from a control gate to a charge trapping materialBHATTACHARYYA ARUP·Filed 2010·Granted Nov 22, 2011·25 cites·20 claims
- 0397US8058118B2Methods of forming and operating back-side trap non-volatile memory cellsBHATTACHARYYA ARUP·Filed 2010·Granted Nov 15, 2011·27 cites·22 claims
- 0496US8193568B2Nanocrystal based universal memory cells, and memory cellsBHATTACHARYYA ARUP·Filed 2010·Granted Jun 5, 2012·25 cites·15 claims
- 0596US8159875B2Methods of storing multiple data-bits in a non-volatile memory cellBHATTACHARYYA ARUP·Filed 2009·Granted Apr 17, 2012·30 cites·20 claims
- 0694US8462557B2Methods of operating memory cell having asymmetric band-gap tunnel insulator using direct tunnelingBHATTACHARYYA ARUP·Filed 2010·Granted Jun 11, 2013·16 cites·21 claims
- 0794US8242554B2Integrated two device non-volatile memoryBHATTACHARYYA ARUP·Filed 2009·Granted Aug 14, 2012·24 cites·15 claims
- 0889US8125003B2High-performance one-transistor memory cellBHATTACHARYYA ARUP·Filed 2003·Granted Feb 28, 2012·32 cites·46 claims
- 0988US8294224B2Devices and methods to improve carrier mobilityBHATTACHARYYA ARUP·Filed 2006·Granted Oct 23, 2012·11 cites·61 claims
- 1086US8679928B2Methods for stressing transistor channels of a semiconductor device structureBHATTACHARYYA ARUP·Filed 2012·Granted Mar 25, 2014·5 cites·20 claims
- 1179US8415715B2Discrete trap non-volatile multi-functional memory deviceBHATTACHARYYA ARUP·Filed 2012·Granted Apr 9, 2013·3 cites·20 claims
- 1275US8129243B2Methods of forming non-volatile memory having tunnel insulator of increasing conduction band offsetBHATTACHARYYA ARUP·Filed 2008·Granted Mar 6, 2012·4 cites·20 claims
- 1374US8293611B2Implantation processes for straining transistor channels of semiconductor device structures and semiconductor devices with strained transistor channelsBHATTACHARYYA ARUP·Filed 2007·Granted Oct 23, 2012·3 cites·18 claims
- 1474US8288264B2Scalable multi-function and multi-level nano-crystal non-volatile memory deviceBHATTACHARYYA ARUP·Filed 2011·Granted Oct 16, 2012·2 cites·14 claims
- 1572US8802526B2Methods of forming reverse mode non-volatile memory cell structuresBHATTACHARYYA ARUP·Filed 2012·Granted Aug 12, 2014·2 cites·19 claims
- 1671US8062945B2Methods of forming non-volatile memory structure with crested barrier tunnel layerBHATTACHARYYA ARUP·Filed 2010·Granted Nov 22, 2011·2 cites·18 claims
- 1770US8153497B2Lanthanide dielectric with controlled interfacesBHATTACHARYYA ARUP·Filed 2011·Granted Apr 10, 2012·1 cites·18 claims
- 1868US8530951B2Scalable multi-functional and multi-level nano-crystal non-volatile memory deviceBHATTACHARYYA ARUP·Filed 2012·Granted Sep 10, 2013·1 cites·20 claims
- 1962US8319272B2Solar cell systemsBHATTACHARYYA ARUP·Filed 2010·Granted Nov 27, 2012·0 cites·8 claims
- 2057US2006237809A1Methods of making optoelectronic devicesBHATTACHARYYA ARUP·Filed 2006·Application pending·0 cites
- 2156US8399332B2Lanthanide dielectric with controlled interfacesBHATTACHARYYA ARUP·Filed 2012·Granted Mar 19, 2013·0 cites·20 claims
- 2253US2012139004A1High-performance one-transistor memory cellBHATTACHARYYA ARUP·Filed 2012·Application pending·0 cites
- 2350US2011248353A1Methods of forming strained semiconductor channelsBHATTACHARYYA ARUP·Filed 2011·Application pending·0 cites
- 2446US2006011978A1Semiconductor constructions and integrated circuitsBHATTACHARYYA ARUP·Filed 2005·Application pending·0 cites
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