Assignee
ARTERIS INC
US·86 granted patents·42 pending applications·217 citations·filing 2014–2025
Top patents by PatentIndex Score
128 records- 0197US11449655B2Synthesis of a network-on-chip (NoC) using performance constraints and objectivesARTERIS INC·Filed 2020·Granted Sep 20, 2022·18 cites·17 claims
- 0296US11121933B2Physically aware topology synthesis of a networkARTERIS INC·Filed 2019·Granted Sep 14, 2021·27 cites·14 claims
- 0396US10990724B1System and method for incremental topology synthesis of a network-on-chipARTERIS INC·Filed 2019·Granted Apr 27, 2021·24 cites·8 claims
- 0496US9940423B2Editing a NoC topology on top of a floorplanARTERIS INC·Filed 2015·Granted Apr 10, 2018·23 cites·19 claims
- 0594US9542316B1System and method for adaptation of coherence models between agentsARTERIS INC·Filed 2015·Granted Jan 10, 2017·12 cites·15 claims
- 0693US11281827B1Optimization of parameters for synthesis of a topology using a discriminant function moduleARTERIS INC·Filed 2020·Granted Mar 22, 2022·19 cites·8 claims
- 0793US11210445B1System and method for interface protectionARTERIS INC·Filed 2020·Granted Dec 28, 2021·6 cites·20 claims
- 0893US9825779B2Network-on-chip (NoC) topology generationARTERIS INC·Filed 2015·Granted Nov 21, 2017·21 cites·14 claims
- 0990US11847394B2System and method for using interface protection parametersARTERIS INC·Filed 2021·Granted Dec 19, 2023·2 cites·12 claims
- 1090US2026010512A1Network on chip broadcasters using duplicated transactionsARTERIS INC·Filed 2025·Application pending·0 cites
- 1189US12164428B2System and method for event messages in a cache coherent interconnectARTERIS INC·Filed 2022·Granted Dec 10, 2024·2 cites·9 claims
- 1288US12237980B2Topology synthesis of a network-on-chip (NoC)ARTERIS INC·Filed 2021·Granted Feb 25, 2025·2 cites·15 claims
- 1388US11836427B2Constraints and objectives used in synthesis of a network-on-chip (NoC)ARTERIS INC·Filed 2022·Granted Dec 5, 2023·1 cites·10 claims
- 1488US11601357B2System and method for generation of quality metrics for optimization tasks in topology synthesis of a networkARTERIS INC·Filed 2020·Granted Mar 7, 2023·2 cites·5 claims
- 1588US10528421B2Protection scheme conversionARTERIS INC·Filed 2015·Granted Jan 7, 2020·9 cites·26 claims
- 1687US11675942B2Optimization of parameters for synthesis of a topology using a discriminant function moduleARTERIS INC·Filed 2022·Granted Jun 13, 2023·2 cites·7 claims
- 1787US11657203B2Multi-phase topology synthesis of a network-on-chip (NoC)ARTERIS INC·Filed 2020·Granted May 23, 2023·2 cites·10 claims
- 1886US10949585B1System and method for predicting performance, power and area behavior of soft IP components in integrated circuit designARTERIS INC·Filed 2019·Granted Mar 16, 2021·10 cites·16 claims
- 1986US10902166B2System and method for isolating faults in a resilient systemARTERIS INC·Filed 2018·Granted Jan 26, 2021·5 cites·8 claims
- 2084US12093177B2Multi-level partitioned snoop filterARTERIS INC·Filed 2022·Granted Sep 17, 2024·1 cites·15 claims
- 2184US11665776B2System and method for synthesis of a network-on-chip for deadlock-free transformationARTERIS INC·Filed 2020·Granted May 30, 2023·2 cites·19 claims
- 2283US12411801B2System and method for transaction broadcast in a network on chipARTERIS INC·Filed 2024·Granted Sep 9, 2025·0 cites·11 claims
- 2383US2025373572A1DESIGN TOOL FOR GENERATION OF DEADLOCK FREE NETWORK-ON-CHIP (NoC) WITHIN A SYSTEM-ON-CHIP (SoC)ARTERIS INC·Filed 2025·Application pending·0 cites
- 2482US10146615B2Recovery of a system directory after detection of uncorrectable errorARTERIS INC·Filed 2017·Granted Dec 4, 2018·4 cites·4 claims
- 2582US2026010686A1Design tool for using sub-architectures of a main architecture in network-on-ship design distribution and assemblyARTERIS INC·Filed 2025·Application pending·0 cites
- 2682US2026010695A1DESIGN TOOL FOR CONNECTING PORTS OF A NETWORK-ON-CHIP (NoC) VIA REGULAR EXPRESSIONSARTERIS INC·Filed 2025·Application pending·0 cites
- 2782US2026012395A1METHOD FOR CONNECTING PORTS OF A NETWORK-ON-CHIP (NoC) VIA REGULAR EXPRESSIONSARTERIS INC·Filed 2025·Application pending·0 cites
- 2881US2025315584A1System and method for using interface protection parametersARTERIS INC·Filed 2025·Application pending·0 cites
- 2981US2025335651A1Design tool using machine learning for incremental placement of elements on floorplanARTERIS INC·Filed 2025·Application pending·0 cites
- 3081US2025335690A1Design tool using machine learning models for interactive route determination in a network-on-chipARTERIS INC·Filed 2025·Application pending·0 cites
- 3181US2025293940A1MODIFICATION OF EXISTING NETWORK-ON-CHIPs (NoCs) USING INCREMENTAL MODIFICATIONSARTERIS INC·Filed 2025·Application pending·0 cites
- 3280US12348382B2Incremental topology modification of a network-on-chipARTERIS INC·Filed 2024·Granted Jul 1, 2025·0 cites·1 claims
- 3380US9652391B2Compression of hardware cache coherent addressesARTERIS INC·Filed 2015·Granted May 16, 2017·3 cites·16 claims
- 3479US12204833B2System and method to generate a network-on-chip (NoC) description using incremental topology synthesisARTERIS INC·Filed 2023·Granted Jan 21, 2025·0 cites·11 claims
- 3579US10268794B2Editing a NoC topology on top of a floorplanARTERIS INC·Filed 2018·Granted Apr 23, 2019·2 cites·20 claims
- 3678US12135928B2Constraints and objectives used in synthesis of a network-on-chip (NoC)ARTERIS INC·Filed 2023·Granted Nov 5, 2024·0 cites·7 claims
- 3778US12067335B2Automatic configuration of pipeline modules in an electronics systemARTERIS INC·Filed 2022·Granted Aug 20, 2024·1 cites·19 claims
- 3878US11080191B2Configurable snoop filters for cache coherent systemsARTERIS INC·Filed 2020·Granted Aug 3, 2021·1 cites·14 claims
- 3977US12340156B2System and method for using interface protection parametersARTERIS INC·Filed 2023·Granted Jun 24, 2025·0 cites·13 claims
- 4077US2025317378A1BROADCASTER WITH BUFFERING FOR NETWORK ON CHIP (NoC)ARTERIS INC·Filed 2025·Application pending·0 cites
- 4177US2024403511A1Design tool for interactive incremental placement of elements on floorplanARTERIS INC·Filed 2024·Application pending·0 cites
- 4275US12038866B2Broadcast adapters in a network-on-chipARTERIS INC·Filed 2022·Granted Jul 16, 2024·0 cites·10 claims
- 4374US10877839B2Recovery of a coherent system in the presence of an uncorrectable errorARTERIS INC·Filed 2017·Granted Dec 29, 2020·3 cites·6 claims
- 4474US10452499B2Redundancy for cache coherence systemsARTERIS INC·Filed 2018·Granted Oct 22, 2019·1 cites·16 claims
- 4574US2024403534A1Design tool for interactive wire routing during the generation of a network-on-chipARTERIS INC·Filed 2024·Application pending·0 cites
- 4674US2025233833A1SYSTEM AND METHOD FOR DEADLOCK DETECTION IN NETWORK-ON-CHIP (NoC) HAVING EXTERNAL DEPENDENCIESARTERIS INC·Filed 2025·Application pending·0 cites
- 4774US2025156616A1System and method to generate a network-on-chip topology using incremental synthesisARTERIS INC·Filed 2025·Application pending·0 cites
- 4873US12210810B2System and method for predicting performance, power and area behavior of soft IP components in integrated circuit designARTERIS INC·Filed 2023·Granted Jan 28, 2025·0 cites·12 claims
- 4972US12517829B1Processing writes to multiple targets in a directory-based cache coherent electronic systemARTERIS INC·Filed 2024·Granted Jan 6, 2026·0 cites·20 claims
- 5072US12335134B2Network-on-chip (NoC) with a broadcast switch systemARTERIS INC·Filed 2023·Granted Jun 17, 2025·0 cites·6 claims
Showing the top 50 of 128 patent records by PatentIndex Score.
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Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →